Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The AI Research Residency is Normal Computing's flagship program for exceptional researchers and engineers who want to work at the frontier of agentic AI. Residents join a small, hand-picked cohort with a dedicated research mentor, direct access to the team building our agentic code generation platform, and a clear arc from onboarding through publication.
Every residency is built around two milestones that mark you as part of something bigger than a single project: a research paper co-authored with our team, and a company-wide research colloquium where you present your findings to the full Normal Computing organization. You'll leave with a body of published, presented work, and a standing as one of the earliest residents to help define what this program becomes.
You'll spend your residency embedded with the team advancing agentic LLMs and reinforcement learning at Normal Computing — designing experiments, building agents, and creating the evaluations that tell us whether any of it actually works.
This is a hands-on research residency: you'll take ownership of a real technical problem in agentic code generation and tool use, work alongside the researchers and engineers building our platform, and be expected to contribute ideas, not just execute someone else's.
Your job is to help turn research into production-quality research code that a team can build on, and, where the work is ready, into customer-facing improvements. Cross-functional collaboration with our hardware team will be encouraged, for example by bringing novel AI tools to enable our hardware efforts via recursive self improvement. Outside-of-the-box thinking is encouraged.
You'll get direct exposure to the pace, ambiguity, and speed of decision-making that comes with working at a fast-moving, well-funded startup — where the distance between an idea on a whiteboard and a feature in front of a customer is measured in weeks, not years.
Develop multi-agent and RL strategies. Help build multi-agent and reinforcement learning strategies for agentic code generation and tool use, and turn them into research prototypes integrated with our code generation platform.
Build evaluation suites and dashboards. Help build comprehensive evaluation suites — task specifications, benchmarks, and performance dashboards — that tell us honestly how agentic and sequential-decision systems are actually performing.
Acquire and curate datasets. Source and curate datasets from technical documents and other materials, and generate synthetic data where real data is scarce or the task calls for it.
Drive a research question of your own. Partner with researchers and engineers to scope, run, and iterate on an original technical investigation, with rigorous experimental analysis and documentation along the way.
Co-author a paper. Work with the team to write up your findings for submission to a relevant venue, with mentorship on framing, experiments, and technical writing along the way — one of the two milestones every resident builds toward.
Present at the residency colloquium. Share your work and thinking with the broader Normal Computing research community at the program's capstone event, and get real-time feedback from people building this technology every day.
Experience startup pace firsthand. Work directly with founders, senior researchers, and engineers in a lean, fast-moving environment where priorities shift quickly and your work has an outsized, visible impact.
Currently pursuing or recently completed a graduate degree (MS or PhD, or equivalent research experience) in computer science, AI, machine learning, or a related field. Publications are a strong plus, but not required at the resident level — a solid research track record is what matters.
Strong Python skills and proficiency with modern ML frameworks (PyTorch preferred).
Familiarity with agentic LLM concepts — multi-agent systems, tool use, reinforcement learning variants, constrained decoding, program synthesis — and a genuine interest in keeping current with the field. Deep production experience isn't expected at the resident level, but the intuition should feel familiar.
Some experience (course projects, research, or otherwise) turning a research idea into working, reasonably reproducible code — you care about whether results replicate, not just whether a demo works once.
Comfort with, or eagerness to learn, the practical side of research: acquiring and curating datasets, thinking through licensing and provenance, and building evaluation frameworks for sequential or agentic tasks.
Bonus: prior work in program synthesis, code generation, constrained decoding, or offline RL; open-source contributions to frameworks like CleanRL, LangGraph, or Transformers; or exposure to the semiconductor domain.
Strong written and verbal communication skills; prior experience writing up research (papers, theses, technical reports) is a plus, as is any experience presenting technical work to a live audience.
A bias toward ownership and self-direction — you're energized, not overwhelmed, by the ambiguity and speed of a small, fast-moving startup.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE RESIDENCY PROGRAM\n\nThe AI Research Residency is Normal Computing's flagship program for exceptional researchers and engineers who want to work at the frontier of agentic AI. Residents join a small, hand-picked cohort with a dedicated research mentor, direct access to the team building our agentic code generation platform, and a clear arc from onboarding through publication.\n\nEvery residency is built around two milestones that mark you as part of something bigger than a single project: a research paper co-authored with our team, and a company-wide research colloquium where you present your findings to the full Normal Computing organization. You'll leave with a body of published, presented work, and a standing as one of the earliest residents to help define what this program becomes.\n\n\n\n\nYOUR NORMAL EXPERIENCE\n\n - You'll spend your residency embedded with the team advancing agentic LLMs and reinforcement learning at Normal Computing — designing experiments, building agents, and creating the evaluations that tell us whether any of it actually works.\n\n - This is a hands-on research residency: you'll take ownership of a real technical problem in agentic code generation and tool use, work alongside the researchers and engineers building our platform, and be expected to contribute ideas, not just execute someone else's.\n\n - Your job is to help turn research into production-quality research code that a team can build on, and, where the work is ready, into customer-facing improvements. Cross-functional collaboration with our hardware team will be encouraged, for example by bringing novel AI tools to enable our hardware efforts via recursive self improvement. Outside-of-the-box thinking is encouraged.\n\n - You'll get direct exposure to the pace, ambiguity, and speed of decision-making that comes with working at a fast-moving, well-funded startup — where the distance between an idea on a whiteboard and a feature in front of a customer is measured in weeks, not years.\n\n\nWHAT YOU'LL DO\n\n - Develop multi-agent and RL strategies. Help build multi-agent and reinforcement learning strategies for agentic code generation and tool use, and turn them into research prototypes integrated with our code generation platform.\n\n - Build evaluation suites and dashboards. Help build comprehensive evaluation suites — task specifications, benchmarks, and performance dashboards — that tell us honestly how agentic and sequential-decision systems are actually performing.\n\n - Acquire and curate datasets. Source and curate datasets from technical documents and other materials, and generate synthetic data where real data is scarce or the task calls for it.\n\n - Drive a research question of your own. Partner with researchers and engineers to scope, run, and iterate on an original technical investigation, with rigorous experimental analysis and documentation along the way.\n\n - Co-author a paper. Work with the team to write up your findings for submission to a relevant venue, with mentorship on framing, experiments, and technical writing along the way — one of the two milestones every resident builds toward.\n\n - Present at the residency colloquium. Share your work and thinking with the broader Normal Computing research community at the program's capstone event, and get real-time feedback from people building this technology every day.\n\n - Experience startup pace firsthand. Work directly with founders, senior researchers, and engineers in a lean, fast-moving environment where priorities shift quickly and your work has an outsized, visible impact.\n\n\nWHAT WOULD MAKE YOU A GREAT FIT\n\n - Currently pursuing or recently completed a graduate degree (MS or PhD, or equivalent research experience) in computer science, AI, machine learning, or a related field. Publications are a strong plus, but not required at the resident level — a solid research track record is what matters.\n\n - Strong Python skills and proficiency with modern ML frameworks (PyTorch preferred).\n\n - Familiarity with agentic LLM concepts — multi-agent systems, tool use, reinforcement learning variants, constrained decoding, program synthesis — and a genuine interest in keeping current with the field. Deep production experience isn't expected at the resident level, but the intuition should feel familiar.\n\n - Some experience (course projects, research, or otherwise) turning a research idea into working, reasonably reproducible code — you care about whether results replicate, not just whether a demo works once.\n\n - Comfort with, or eagerness to learn, the practical side of research: acquiring and curating datasets, thinking through licensing and provenance, and building evaluation frameworks for sequential or agentic tasks.\n\n - Bonus: prior work in program synthesis, code generation, constrained decoding, or offline RL; open-source contributions to frameworks like CleanRL, LangGraph, or Transformers; or exposure to the semiconductor domain.\n\n - Strong written and verbal communication skills; prior experience writing up research (papers, theses, technical reports) is a plus, as is any experience presenting technical work to a live audience.\n\n - A bias toward ownership and self-direction — you're energized, not overwhelmed, by the ambiguity and speed of a small, fast-moving startup.\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"d6d2797c-0201-4d7c-98cd-0317649dc78b","title":"Design Verification Engineer","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}}],"publishedAt":"2026-07-15T20:47:39.513+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/d6d2797c-0201-4d7c-98cd-0317649dc78b","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/d6d2797c-0201-4d7c-98cd-0317649dc78b/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs on the road to tapeout, and set the quality bar for what our AI learns: reviewing generated verification collateral and shaping the standards our models train against. From time to time, you may also be tapped to support a customer deployment alongside our forward-deployed team, where your verification credibility helps our AI platform land inside real DV flows. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat.
Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench environments, assertions, and coverage from design documents through functional coverage and closure, supporting the program to tapeout.
AI Product Refinement: Review AI-generated verification collateral to shape product strategy and tool usability in collaboration with the ML and product teams.
Data Quality Bar: Set the quality standard for verification training data: define rubrics, curate golden examples, and partner with our Data team, who own the pipelines, so our models learn from verification artifacts a real DV engineer would sign off on.
Deployment Support: When needed, support customer engagements alongside our forward-deployed team: validating AI-generated collateral against real customer specifications and lending DV credibility to deployments.
Tooling: Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing resources internally and in customer environments.
5+ years of experience in digital verification at a major semiconductor or EDA tool company
Advanced proficiency in SystemVerilog, UVM methodology, and EDA verification tools (vManager, Xcelium, Jasper), with strong Python or Perl scripting
Proven expertise in end-to-end design verification, including test plan creation, stimulus generation, and feature extraction
Willingness to occasionally support customer-facing deployment work, including some travel
Excellent written and spoken communication skills: you can hold the room with a customer's verification lead as credibly as you hold a debug session
Experience in a customer-facing, field-application, or forward-deployed engineering role at a semiconductor or EDA company
Hands-on use of LLMs or agentic tools in verification workflows
Exposure to analog, mixed-signal, or unconventional compute verification
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs a Design Verification Engineer at Normal, you will verify our own physics-inspired ASICs on the road to tapeout, and set the quality bar for what our AI learns: reviewing generated verification collateral and shaping the standards our models train against. From time to time, you may also be tapped to support a customer deployment alongside our forward-deployed team, where your verification credibility helps our AI platform land inside real DV flows. The through-line is your DV expertise, applied to silicon that computes differently than anything you've verified before, and to the AI that is changing how verification gets done. This is a seat for a verification engineer who wants their craft to compound rather than repeat.\n\n\n\n\nWHAT YOU WILL OWN\n\n - Thermodynamic ASIC Verification: Own design verification for Normal's internal silicon: testbench environments, assertions, and coverage from design documents through functional coverage and closure, supporting the program to tapeout.\n\n - AI Product Refinement: Review AI-generated verification collateral to shape product strategy and tool usability in collaboration with the ML and product teams.\n\n - Data Quality Bar: Set the quality standard for verification training data: define rubrics, curate golden examples, and partner with our Data team, who own the pipelines, so our models learn from verification artifacts a real DV engineer would sign off on.\n\n - Deployment Support: When needed, support customer engagements alongside our forward-deployed team: validating AI-generated collateral against real customer specifications and lending DV credibility to deployments.\n\n - Tooling: Set up and evaluate EDA tools, ensuring usability and effective deployment on shared computing resources internally and in customer environments.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - 5+ years of experience in digital verification at a major semiconductor or EDA tool company\n\n - Advanced proficiency in SystemVerilog, UVM methodology, and EDA verification tools (vManager, Xcelium, Jasper), with strong Python or Perl scripting\n\n - Proven expertise in end-to-end design verification, including test plan creation, stimulus generation, and feature extraction\n\n - Willingness to occasionally support customer-facing deployment work, including some travel\n\n - Excellent written and spoken communication skills: you can hold the room with a customer's verification lead as credibly as you hold a debug session\n\n\nBONUS POINTS\n\n - Experience in a customer-facing, field-application, or forward-deployed engineering role at a semiconductor or EDA company\n\n - Hands-on use of LLMs or agentic tools in verification workflows\n\n - Exposure to analog, mixed-signal, or unconventional compute verification\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"308ca921-30d3-43bc-8217-8570c62480b2","title":"Hardware Engineer, ASIC Architect","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"Silicon Valley","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"New York City","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}}}],"publishedAt":"2026-09-30T06:14:07.609+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/308ca921-30d3-43bc-8217-8570c62480b2","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/308ca921-30d3-43bc-8217-8570c62480b2/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As a Hardware ASIC Architect, you will define the silicon and system microarchitecture for our custom unconventional compute platform—driving the architectural trade-offs that unlock a 100–1000x leap in energy efficiency over traditional digital chips for LLM and diffusion model inference.
You will lead the hardware/software co-design efforts to break the von Neumann memory wall. By translating transformer architectures (KV-cache management, attention mechanisms) and diffusion execution flows into custom mixed-signal compute tiles, memory hierarchies, and tile interconnects, you will set the blueprint for our hardware. Working closely with compiler, RTL, and analog teams, you will build performance models, establish microarchitectural specifications, and ensure our custom silicon delivers maximum throughput-per-watt on real-world generative AI workloads.
Compute Architecture: Help define the architecture and microarchitecture of novel AI accelerator compute blocks: PE array design, datapath organization, and support for efficiency techniques such as sparsity exploitation and reduced-precision computation. The compute tile is the surface where Normal's research advantages have to show up in silicon, and you are one of the people responsible for making sure they do.
Workload-to-Hardware Translation: Translate workload analysis and research findings into hardware specifications. Identify where architectural innovation creates the most leverage, define the structures that realize it, and produce microarchitecture documents unambiguous enough for RTL engineers to implement against. You work closely with them through implementation, not over the wall from it.
Full-Stack PPA Tradeoffs: Reason across the full stack and defend PPA tradeoffs at every level. Move between algorithm-level workload behavior, memory hierarchy, on-chip interconnect, and physical design constraints. Make the call when the data is incomplete, and articulate why under scrutiny from our Systems Architect and the research team.
ISA Co-Design: Partner with the compiler lead on ISA co-design. The programming model and the microarchitecture are defined together, and you are accountable for both sides meeting in the middle.
Prototyping Strategy: Direct block-level pre-silicon validation. Decide which microarchitecture questions need to be answered, and the appropriate platform. Partner with our FPGA Design Engineers, who own implementation and bring-up, to de-risk decisions before tapeout. Work with the Systems Architect to make sure there are no gaps from block to System-level validation.
Research Fluency: Stay current with the AI accelerator research landscape and be able to articulate clearly where Normal's approach differs from existing solutions and why that matters. This is a research-adjacent seat and you are expected to read, possibly publish, and not just consume.
A degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience. PhD welcome but not required; the bar is the work, not the credential.
Substantial experience in architecture or microarchitecture of high-performance digital systems: AI accelerators, compute engines, or similarly complex logic. You have shaped and directed the structures inside a chip, not just consumed them from the outside.
Fluency moving between algorithm-level analysis and hardware specification. You can read a profile of a workload and translate it into datapath widths, pipeline stages, and area/power estimates without losing the thread on either side.
Experience with simulation-driven architecture. You have used cycle-accurate or analytical models to make and defend design decisions before RTL exists, and you know which questions each tool can answer and which it cannot.
Familiarity with quantization and reduced-precision approaches for inference and their implementation implications. You understand the cost of a bit at the hardware level, not just the model level.
Experience writing microarchitecture specifications and working closely with RTL engineers through implementation.
Proficiency in Python or C++ for performance modeling and analysis, and familiarity with SystemVerilog or equivalent RTL.
Comfort operating in an environment where the architecture is actively being discovered alongside the work. You do not need the answer to be already known to make progress on it.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs a Hardware ASIC Architect, you will define the silicon and system microarchitecture for our custom unconventional compute platform—driving the architectural trade-offs that unlock a 100–1000x leap in energy efficiency over traditional digital chips for LLM and diffusion model inference.\n\nYou will lead the hardware/software co-design efforts to break the von Neumann memory wall. By translating transformer architectures (KV-cache management, attention mechanisms) and diffusion execution flows into custom mixed-signal compute tiles, memory hierarchies, and tile interconnects, you will set the blueprint for our hardware. Working closely with compiler, RTL, and analog teams, you will build performance models, establish microarchitectural specifications, and ensure our custom silicon delivers maximum throughput-per-watt on real-world generative AI workloads.\n\n\n\nWHAT YOU WILL OWN\n\n - Compute Architecture: Help define the architecture and microarchitecture of novel AI accelerator compute blocks: PE array design, datapath organization, and support for efficiency techniques such as sparsity exploitation and reduced-precision computation. The compute tile is the surface where Normal's research advantages have to show up in silicon, and you are one of the people responsible for making sure they do.\n\n - Workload-to-Hardware Translation: Translate workload analysis and research findings into hardware specifications. Identify where architectural innovation creates the most leverage, define the structures that realize it, and produce microarchitecture documents unambiguous enough for RTL engineers to implement against. You work closely with them through implementation, not over the wall from it.\n\n - Full-Stack PPA Tradeoffs: Reason across the full stack and defend PPA tradeoffs at every level. Move between algorithm-level workload behavior, memory hierarchy, on-chip interconnect, and physical design constraints. Make the call when the data is incomplete, and articulate why under scrutiny from our Systems Architect and the research team.\n\n - ISA Co-Design: Partner with the compiler lead on ISA co-design. The programming model and the microarchitecture are defined together, and you are accountable for both sides meeting in the middle.\n\n - Prototyping Strategy: Direct block-level pre-silicon validation. Decide which microarchitecture questions need to be answered, and the appropriate platform. Partner with our FPGA Design Engineers, who own implementation and bring-up, to de-risk decisions before tapeout. Work with the Systems Architect to make sure there are no gaps from block to System-level validation.\n\n - Research Fluency: Stay current with the AI accelerator research landscape and be able to articulate clearly where Normal's approach differs from existing solutions and why that matters. This is a research-adjacent seat and you are expected to read, possibly publish, and not just consume.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - A degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent work experience. PhD welcome but not required; the bar is the work, not the credential.\n\n - Substantial experience in architecture or microarchitecture of high-performance digital systems: AI accelerators, compute engines, or similarly complex logic. You have shaped and directed the structures inside a chip, not just consumed them from the outside.\n\n - Fluency moving between algorithm-level analysis and hardware specification. You can read a profile of a workload and translate it into datapath widths, pipeline stages, and area/power estimates without losing the thread on either side.\n\n - Experience with simulation-driven architecture. You have used cycle-accurate or analytical models to make and defend design decisions before RTL exists, and you know which questions each tool can answer and which it cannot.\n\n - Familiarity with quantization and reduced-precision approaches for inference and their implementation implications. You understand the cost of a bit at the hardware level, not just the model level.\n\n - Experience writing microarchitecture specifications and working closely with RTL engineers through implementation.\n\n - Proficiency in Python or C++ for performance modeling and analysis, and familiarity with SystemVerilog or equivalent RTL.\n\n - Comfort operating in an environment where the architecture is actively being discovered alongside the work. You do not need the answer to be already known to make progress on it.\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"e81b27d7-9505-40fb-859c-0dcc2f404a3f","title":"AI Engineer","department":"Engineering","team":"AI / ML","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-07-15T20:47:57.724+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/e81b27d7-9505-40fb-859c-0dcc2f404a3f","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/e81b27d7-9505-40fb-859c-0dcc2f404a3f/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As an AI Engineer at Normal, you will build production systems that understand large technical documents, like chip design specifications, and turn them into code. You'll ship real improvements to customers weekly while pushing the boundaries of what's possible in AI for hardware through reinforcement learning, agentic coding, and exceptional software engineering.
End-to-End Development: Lead AI development from initial concept through production deployment and iteration.
Document Understanding: Design and implement LLM-powered solutions that extract meaning from complex technical specifications.
Agentic Systems: Handle multi-modal complexity and explore multi-agent and RL approaches for agentic code generation and tool use.
Production Quality: Design strategies to manage latency, output variance, and graceful error handling at scale.
Platform Integration: Collaborate with product and engineering teams to embed AI capabilities seamlessly into our platform.
Mentorship: Guide junior engineers and establish best practices for AI development.
Previous experience delivering production AI systems involving language models, preferably involving document understanding and/or agentic workflows
Solid software engineering skills with experience in distributed systems and production-grade code
Proficiency in Python and modern ML frameworks (PyTorch, Hugging Face, transformers)
Hands-on experience with prompt engineering, fine-tuning, and deploying large language models
Ability to wrangle, clean, and preprocess large-scale, heterogeneous datasets
Ability to explain complex AI concepts to both technical and non-technical stakeholders
Experience with hardware design, hardware verification, or EDA tooling
Experience deploying AI systems in mission-critical or high-stakes production environments
Experience with cloud platforms (AWS, GCP, Azure) for large-scale AI infrastructure
Research or applied experience with LLM agents, RL (offline/online, RLHF/RLAIF), constrained decoding, or program synthesis
Open-source contributions or publications in AI/ML venues
Skill in balancing cutting-edge innovation with production reliability and pragmatism
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs an AI Engineer at Normal, you will build production systems that understand large technical documents, like chip design specifications, and turn them into code. You'll ship real improvements to customers weekly while pushing the boundaries of what's possible in AI for hardware through reinforcement learning, agentic coding, and exceptional software engineering.\n\n\nWHAT YOU WILL OWN\n\n - End-to-End Development: Lead AI development from initial concept through production deployment and iteration.\n\n - Document Understanding: Design and implement LLM-powered solutions that extract meaning from complex technical specifications.\n\n - Agentic Systems: Handle multi-modal complexity and explore multi-agent and RL approaches for agentic code generation and tool use.\n\n - Production Quality: Design strategies to manage latency, output variance, and graceful error handling at scale.\n\n - Platform Integration: Collaborate with product and engineering teams to embed AI capabilities seamlessly into our platform.\n\n - Mentorship: Guide junior engineers and establish best practices for AI development.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Previous experience delivering production AI systems involving language models, preferably involving document understanding and/or agentic workflows\n\n - Solid software engineering skills with experience in distributed systems and production-grade code\n\n - Proficiency in Python and modern ML frameworks (PyTorch, Hugging Face, transformers)\n\n - Hands-on experience with prompt engineering, fine-tuning, and deploying large language models\n\n - Ability to wrangle, clean, and preprocess large-scale, heterogeneous datasets\n\n - Ability to explain complex AI concepts to both technical and non-technical stakeholders\n\n\nBONUS POINTS\n\n - Experience with hardware design, hardware verification, or EDA tooling\n\n - Experience deploying AI systems in mission-critical or high-stakes production environments\n\n - Experience with cloud platforms (AWS, GCP, Azure) for large-scale AI infrastructure\n\n - Research or applied experience with LLM agents, RL (offline/online, RLHF/RLAIF), constrained decoding, or program synthesis\n\n - Open-source contributions or publications in AI/ML venues\n\n - Skill in balancing cutting-edge innovation with production reliability and pragmatism\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"44eec898-0d9f-40ce-81c5-9b19e5afdf17","title":"Research Engineer, Domain Scaling","department":"Engineering","team":"AI / ML","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-08-10T04:36:06.790+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/44eec898-0d9f-40ce-81c5-9b19e5afdf17","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/44eec898-0d9f-40ce-81c5-9b19e5afdf17/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The Domain Scaling team has the goal of making Normal’s Agents world-class at anything Chip-Engineering and EDA-related, UVM, debugging, analog, lean formalization, materials-aware optimization, etc. This is a unique role that combines executing directly on applied research and data sourcing (real-world and synthetic) to improve our models.
You'll own the end-to-end process of creating RL environments for new capabilities: identifying high-value tasks, designing reward signals, managing vendor relationships, and measuring impact on model performance.
Own the data strategy for knowledge work verticals end-to-end, from task sourcing through RL training
Build and manage relationships with external vendors, including outreach, evaluation of data quality, and reward design
Collaborate with domain experts to design data pipelines and evaluations
Explore novel ways of creating RL environments for high-value tasks
Develop and improve QA frameworks to catch reward hacking and ensure environment quality
Run generalization experiments to measure how data strategy changes improve model capabilities
Partner with other AI researchers and product teams to translate capability goals into training environments, evals, and real product features
Have experience with post-training large language models for specific domains or real-world use cases
Have experience with reinforcement learning, reward design, or training data curation for LLMs
Are comfortable managing technical vendor relationships and iterating quickly on feedback
Find value in reading through datasets to understand them and spot issues
Have strong cross-functional collaboration skills
Are passionate about making AI more useful for chip development and recursive hardware self-improvement
Are excited about a role that includes a combination of applied research and hands-on data work
Have experience training production ML systems
Have experience designing evals or benchmarks for LLMs
Have domain expertise in a vertical where we would like to make our models more useful
Have experience working with external vendors or technical partners
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nThe Domain Scaling team has the goal of making Normal’s Agents world-class at anything Chip-Engineering and EDA-related, UVM, debugging, analog, lean formalization, materials-aware optimization, etc. This is a unique role that combines executing directly on applied research and data sourcing (real-world and synthetic) to improve our models.\n\nYou'll own the end-to-end process of creating RL environments for new capabilities: identifying high-value tasks, designing reward signals, managing vendor relationships, and measuring impact on model performance.\n\n\nWHAT YOU WILL OWN\n\n - Own the data strategy for knowledge work verticals end-to-end, from task sourcing through RL training\n\n - Build and manage relationships with external vendors, including outreach, evaluation of data quality, and reward design\n\n - Collaborate with domain experts to design data pipelines and evaluations\n\n - Explore novel ways of creating RL environments for high-value tasks\n\n - Develop and improve QA frameworks to catch reward hacking and ensure environment quality\n\n - Run generalization experiments to measure how data strategy changes improve model capabilities\n\n - Partner with other AI researchers and product teams to translate capability goals into training environments, evals, and real product features\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Have experience with post-training large language models for specific domains or real-world use cases\n\n - Have experience with reinforcement learning, reward design, or training data curation for LLMs\n\n - Are comfortable managing technical vendor relationships and iterating quickly on feedback\n\n - Find value in reading through datasets to understand them and spot issues\n\n - Have strong cross-functional collaboration skills\n\n - Are passionate about making AI more useful for chip development and recursive hardware self-improvement\n\n - Are excited about a role that includes a combination of applied research and hands-on data work\n\n\nBONUS POINTS\n\n - Have experience training production ML systems\n\n - Have experience designing evals or benchmarks for LLMs\n\n - Have domain expertise in a vertical where we would like to make our models more useful\n\n - Have experience working with external vendors or technical partners\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"a1829ea4-36fc-42a9-af1d-5382f121ccf7","title":"Forward Deployed Engineer","department":"Engineering","team":"Forward Deployed ML","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}}],"publishedAt":"2026-06-08T16:30:51.102+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/a1829ea4-36fc-42a9-af1d-5382f121ccf7","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/a1829ea4-36fc-42a9-af1d-5382f121ccf7/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The cost of taping out silicon is enormous, and the complexity of verification makes multiple tapeouts hard to avoid. Normal EDA accelerates this work as an AI platform for collaborative silicon engineering: a single source of truth across the chip lifecycle, learning continuously from the teams that use it. As a Forward Deployed Engineer, you own our EDA system inside a customer's environment. Embedded directly with our partners, you adapt our platform to their data, workflows, and design challenges, working alongside our account executive and a deployment strategist to make the deployment a success.
You thrive as a problem-solver and take pride in winning over customers along with the rest of your team. You will be debugging distributed systems, building new product features, post-training models, and working in various silicon-native languages such as SystemVerilog. Note that many different kinds of candidates could be well-qualified for this role, even with non-overlapping expertise (e.g. ML background vs. silicon background).
Production Problem-Solving: Diagnose issues in our system, the model, the data, or the workflow. Work deep in both Normal's systems and the customer's environment to resolve them, and close the loop with their engineers.
Evaluation Against Reality: Design and run evals against real customer workflows, validating generated artifacts against their specifications so model behavior holds up in production.
Platform Integration: Integrate the platform with each customer's data, design flows, and tooling, working with their production codebases and against their existing infrastructure.
Customer Signal: Embedded with silicon design teams, translate their constraints into model and platform requirements, and carry that signal back to Normal's research, product, and platform teams to shape what gets built next.
Continual Learning: Post-train Normal's models on-prem on proprietary customer data and trajectories to customize to their workflow, tooling, and style preferences. Build the continual-learning loops that turn their engineers' feedback into system knowledge, so model quality compounds across the engagement.
Judgment Ahead of Playbook: Make the calls on what to build, what to skip, and when to push back on a request that would compromise what ships. Codify what works into patterns that raise the floor for every engagement after yours.
Great at problem-solving and tracking down issues wherever they are in the stack
Strong software engineering fundamentals: proficient in Python, comfortable in production codebases, distributed-systems literate
Hands-on experience with the modern ML stack: prompt engineering, fine-tuning, evals, agentic patterns, model deployment
Willingness and ability to go deep on semiconductor verification workflows. You will spend significant time inside UVM testbenches, SystemVerilog codebases, and design specifications. Prior experience is a strong advantage, but what matters is whether you can build fluency fast and earn credibility with verification engineers
An ability to ship ML systems inside customer or production environments where model behavior had to hold up against real-world data
Calm in ambiguity: you make good decisions with incomplete information, and you know when to act and when to ask
Comfortable with travel when needed; anywhere between a few days for customer meetings and a few months for longer-term customer projects
Direct experience with EDA, semiconductor design flows, verification workflows (UVM, SystemVerilog, coverage-driven verification), or other areas of silicon engineering
Built or led an FDE or customer-deployment function from the ground up at an earlier-stage company
Open-source contributions or publications in AI or ML venues
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nThe cost of taping out silicon is enormous, and the complexity of verification makes multiple tapeouts hard to avoid. Normal EDA accelerates this work as an AI platform for collaborative silicon engineering: a single source of truth across the chip lifecycle, learning continuously from the teams that use it. As a Forward Deployed Engineer, you own our EDA system inside a customer's environment. Embedded directly with our partners, you adapt our platform to their data, workflows, and design challenges, working alongside our account executive and a deployment strategist to make the deployment a success.\n\nYou thrive as a problem-solver and take pride in winning over customers along with the rest of your team. You will be debugging distributed systems, building new product features, post-training models, and working in various silicon-native languages such as SystemVerilog. Note that many different kinds of candidates could be well-qualified for this role, even with non-overlapping expertise (e.g. ML background vs. silicon background).\n\n\n\n\nWHAT YOU WILL OWN\n\n - Production Problem-Solving: Diagnose issues in our system, the model, the data, or the workflow. Work deep in both Normal's systems and the customer's environment to resolve them, and close the loop with their engineers.\n\n - Evaluation Against Reality: Design and run evals against real customer workflows, validating generated artifacts against their specifications so model behavior holds up in production.\n\n - Platform Integration: Integrate the platform with each customer's data, design flows, and tooling, working with their production codebases and against their existing infrastructure.\n\n - Customer Signal: Embedded with silicon design teams, translate their constraints into model and platform requirements, and carry that signal back to Normal's research, product, and platform teams to shape what gets built next.\n\n - Continual Learning: Post-train Normal's models on-prem on proprietary customer data and trajectories to customize to their workflow, tooling, and style preferences. Build the continual-learning loops that turn their engineers' feedback into system knowledge, so model quality compounds across the engagement.\n\n - Judgment Ahead of Playbook: Make the calls on what to build, what to skip, and when to push back on a request that would compromise what ships. Codify what works into patterns that raise the floor for every engagement after yours.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Great at problem-solving and tracking down issues wherever they are in the stack\n\n - Strong software engineering fundamentals: proficient in Python, comfortable in production codebases, distributed-systems literate\n\n - Hands-on experience with the modern ML stack: prompt engineering, fine-tuning, evals, agentic patterns, model deployment\n\n - Willingness and ability to go deep on semiconductor verification workflows. You will spend significant time inside UVM testbenches, SystemVerilog codebases, and design specifications. Prior experience is a strong advantage, but what matters is whether you can build fluency fast and earn credibility with verification engineers\n\n - An ability to ship ML systems inside customer or production environments where model behavior had to hold up against real-world data\n\n - Calm in ambiguity: you make good decisions with incomplete information, and you know when to act and when to ask\n\n - Comfortable with travel when needed; anywhere between a few days for customer meetings and a few months for longer-term customer projects\n\n\nBONUS POINTS\n\n - Direct experience with EDA, semiconductor design flows, verification workflows (UVM, SystemVerilog, coverage-driven verification), or other areas of silicon engineering\n\n - Built or led an FDE or customer-deployment function from the ground up at an earlier-stage company\n\n - Open-source contributions or publications in AI or ML venues\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"e57b966d-c68a-454b-86f0-8747a268478b","title":"Software Engineer, Backend","department":"Engineering","team":"Software","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-07-15T20:56:17.753+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/e57b966d-c68a-454b-86f0-8747a268478b","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/e57b966d-c68a-454b-86f0-8747a268478b/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
Normal is building software for semiconductor engineers: a local CLI that works inside real chip design environments, a web product for managing projects and reviewing results, and backend services that coordinate long-running work across both. Making those pieces feel like one dependable product is a backend engineering problem.
This role spans the backend surface behind that product. Depending on the project, you might design an API shared by several services, evolve a database model without breaking existing sessions, make a state transition idempotent, improve a local agent loop, or remove a deployment or performance bottleneck. The common thread is production software with real state, real failure modes, and users with complex workflows.
We use AI in the product, but this is not an ML role and prior experience with agents is not required. We are looking for backend engineers who enjoy making complex systems clear, reliable, and easy to operate.
Your scope will depend on your experience, interests, and the team’s priorities. You would likely go deep in a few of these areas rather than own all of them:
Design stable, well-typed interfaces across CLI, web, and backend services.
Evolve Postgres schemas, migrations, event histories, and other durable state.
Build lifecycle, queueing, retry, cancellation, idempotency, and recovery behavior for long-running work.
Improve software that runs across developer machines and containerized environments.
Make failures easier to diagnose through metrics, traces, structured logs, health checks, and operator tooling.
Improve how changes are tested, packaged, migrated, deployed, and recovered.
Find and remove performance bottlenecks in APIs, database access, event processing, and execution paths.
Deliver product changes that cross repositories, languages, and service boundaries.
4+ years of software engineering experience and a track record of shipping backend systems that other people depend on.
Experience designing APIs and data models, and reasoning clearly about concurrency and state.
Experience operating production services where reliability, observability, maintainability, and performance matter.
Comfort reasoning about distributed failure modes such as retries, partial completion, duplicate work, cancellation, and recovery.
The ability to debug across boundaries—from a client or CLI through services, databases, and deployment infrastructure.
Pragmatic judgment about when to invest in a durable abstraction and when to ship the straightforward version.
Range: you have gone deep in at least one area and can become productive in an unfamiliar codebase or technical domain.
A product mindset: you care whether the system is understandable and dependable for the people using it, not only whether the code is correct.
Experience with any of the following is helpful, but not required:
Postgres, Redis or Valkey, event-driven architectures, or high-volume stateful services
Kubernetes, containers, cloud infrastructure, or deploying software in resource-constrained, on-premises customer environments
Developer tools, CLIs, workflow engines, job schedulers, or distributed execution systems
Semiconductors, EDA, or hardware engineering workflows
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nNormal is building software for semiconductor engineers: a local CLI that works inside real chip design environments, a web product for managing projects and reviewing results, and backend services that coordinate long-running work across both. Making those pieces feel like one dependable product is a backend engineering problem.\n\nThis role spans the backend surface behind that product. Depending on the project, you might design an API shared by several services, evolve a database model without breaking existing sessions, make a state transition idempotent, improve a local agent loop, or remove a deployment or performance bottleneck. The common thread is production software with real state, real failure modes, and users with complex workflows.\n\nWe use AI in the product, but this is not an ML role and prior experience with agents is not required. We are looking for backend engineers who enjoy making complex systems clear, reliable, and easy to operate.\n\n\n\n\nWHAT YOU WILL OWN\n\nYour scope will depend on your experience, interests, and the team’s priorities. You would likely go deep in a few of these areas rather than own all of them:\n\n - Design stable, well-typed interfaces across CLI, web, and backend services.\n\n - Evolve Postgres schemas, migrations, event histories, and other durable state.\n\n - Build lifecycle, queueing, retry, cancellation, idempotency, and recovery behavior for long-running work.\n\n - Improve software that runs across developer machines and containerized environments.\n\n - Make failures easier to diagnose through metrics, traces, structured logs, health checks, and operator tooling.\n\n - Improve how changes are tested, packaged, migrated, deployed, and recovered.\n\n - Find and remove performance bottlenecks in APIs, database access, event processing, and execution paths.\n\n - Deliver product changes that cross repositories, languages, and service boundaries.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - 4+ years of software engineering experience and a track record of shipping backend systems that other people depend on.\n\n - Experience designing APIs and data models, and reasoning clearly about concurrency and state.\n\n - Experience operating production services where reliability, observability, maintainability, and performance matter.\n\n - Comfort reasoning about distributed failure modes such as retries, partial completion, duplicate work, cancellation, and recovery.\n\n - The ability to debug across boundaries—from a client or CLI through services, databases, and deployment infrastructure.\n\n - Pragmatic judgment about when to invest in a durable abstraction and when to ship the straightforward version.\n\n - Range: you have gone deep in at least one area and can become productive in an unfamiliar codebase or technical domain.\n\n - A product mindset: you care whether the system is understandable and dependable for the people using it, not only whether the code is correct.\n\n\nBONUS POINTS\n\nExperience with any of the following is helpful, but not required:\n\n - Postgres, Redis or Valkey, event-driven architectures, or high-volume stateful services\n\n - Kubernetes, containers, cloud infrastructure, or deploying software in resource-constrained, on-premises customer environments\n\n - Developer tools, CLIs, workflow engines, job schedulers, or distributed execution systems\n\n - Semiconductors, EDA, or hardware engineering workflows\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"a3c71aa7-84fc-4c62-99c4-205ebffc7561","title":"Hardware Engineer, RTL","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"Silicon Valley","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"New York City","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}}}],"publishedAt":"2026-08-10T04:29:41.553+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/a3c71aa7-84fc-4c62-99c4-205ebffc7561","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/a3c71aa7-84fc-4c62-99c4-205ebffc7561/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence.
You will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.
This is a role for an engineer who collaborates effectively across teams, including architecture, verification and physical design. The strongest candidates have taped out silicon, written RTL and helped close coverage, and are comfortable working in an environment where the specification is still being developed in parallel.
RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.
Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures.
Verification: Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage.
Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT.
Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation.
Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed.
Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route
Experience in closing coverage to a high level
At least one tapeout in your background, from any node and any company size
Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront
Strong debugging instincts across simulation, waveforms, and formal counterexamples
Ability to work directly with architects and physical designers without needing a large intermediary layer
Industry experience in ASIC or SoC design
Experience at an AI chip company where design and verification were tightly coupled
Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6
Familiarity with RISC-V or other open ISAs
Experience with AI-assisted RTL or EDA tooling in your design workflow
Exposure to physical design constraints, floorplanning, or timing-driven RTL development
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs an RTL Design Engineer at Normal, you will design and verify the digital logic at the heart of Normal's thermodynamic hardware. This work sits at the intersection of classical ASIC design, novel computing architectures, and a development environment where the hardware and the algorithms are built together, not in sequence.\n\nYou will own RTL from microarchitecture to tapeout: writing microarchitecture specifications, creating synthesizable SystemVerilog, working with design verification engineers fully test the design using conventional and formal methods, and working closely with physical design to make sure the design meets area and timing constraints. Because Normal's chips are not standard accelerators, the RTL engineer here is closer to first-principles decisions than at a larger company. You will be shaping architecture, not just implementing it.\n\nThis is a role for an engineer who collaborates effectively across teams, including architecture, verification and physical design. The strongest candidates have taped out silicon, written RTL and helped close coverage, and are comfortable working in an environment where the specification is still being developed in parallel.\n\n\n\n\nWHAT YOU WILL OWN\n\n - RTL Design: Write and own synthesizable RTL in SystemVerilog across blocks ranging from datapath logic to control and memory interfaces.\n\n - Microarchitecture: Work with architecture to translate high-level specifications into implementable microarchitectures.\n\n - Verification: Work closely with the verification team to review verification plans, assist on debug, and become a partner in closing coverage.\n\n - Physical Design Collaboration: Collaborate with physical design on timing closure, floorplanning constraints, and DFT.\n\n - Design Reviews: Participate in design reviews and contribute to architecture decisions, not just implementation.\n\n - Tapeout & Bring-up: Support tapeout preparation, integration, and post-silicon bring-up as needed.\n\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Hands-on experience writing production RTL in SystemVerilog and closing it through synthesis and place-and-route\n\n - Experience in closing coverage to a high level\n\n - At least one tapeout in your background, from any node and any company size\n\n - Experience working on datapaths, pipelines, or custom logic where the microarchitecture was not fully specified upfront\n\n - Strong debugging instincts across simulation, waveforms, and formal counterexamples\n\n - Ability to work directly with architects and physical designers without needing a large intermediary layer\n\n - Industry experience in ASIC or SoC design\n\n\n\nBONUS POINTS\n\n - Experience at an AI chip company where design and verification were tightly coupled\n\n - Open-source RTL contributions to projects like Chipyard, OpenTitan, or CVA6\n\n - Familiarity with RISC-V or other open ISAs\n\n - Experience with AI-assisted RTL or EDA tooling in your design workflow\n\n - Exposure to physical design constraints, floorplanning, or timing-driven RTL development\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"7605a6b7-7487-4dbf-b6f3-343203b064e9","title":"Silicon Software Lead","department":"Engineering","team":"Silicon Software & Algorithms","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}}],"publishedAt":"2026-07-06T13:51:39.651+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/7605a6b7-7487-4dbf-b6f3-343203b064e9","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/7605a6b7-7487-4dbf-b6f3-343203b064e9/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
Normal's ASIC computes using stochastic analog dynamics in memory, and the software layer that makes it programmable and performant for real inference workloads does not yet exist in any standard form. As our Silicon Software Lead, you will lead the team that creates it: the compiler, runtime, kernels, drivers, and hardware abstraction layer that turn our chip into a platform. You will set technical direction, stay hands-on in the stack, and co-design with hardware architects so that software constraints shape the silicon rather than arriving after it.
This is a role for someone who has built software for hardware that did not exist yet, and wants to do it where the software genuinely impacts and optimizes the hardware.
Team Leadership: Lead and grow the silicon software team spanning compiler, runtime, and systems software, staying close enough to the code to review designs and unblock hard problems directly.
Software Stack Architecture: Own the architecture of the stack from ML framework ingestion through compilation, scheduling, and memory management to execution on Normal hardware.
Software/Hardware Co-Design: Partner with silicon architects on ISA definition and the hardware abstraction layer, ensuring the chip is compilable and programmable, not just simulatable.
Runtime and Tooling: Drive development of the runtime, kernels, drivers, profiling, and debugging tools that make the hardware usable for real inference workloads.
Simulation-to-Silicon Continuity: Keep the software stack running against simulation, FPGA prototypes, and silicon as the hardware matures, so software development never waits on tapeout.
Roadmap and Hiring: Set the silicon software roadmap, define milestones against the hardware program, and hire the engineers who deliver it.
Substantial experience building software stacks for accelerators or non-standard hardware targets: compilers, runtimes, kernels, or drivers
Experience leading engineers as a technical lead or manager while staying hands-on in design and code
Strong systems programming skills in C++, Rust, or equivalent, with fluency in Python
Deep understanding of ML inference workloads and the constraints that shape their execution on hardware
Experience with compiler frameworks such as MLIR or LLVM, or with inference runtimes and kernel development
Comfort building software for hardware that is still evolving, from simulation through bring-up
Track record of hiring and developing strong systems engineers
Experience taking an accelerator software stack from zero to production at a startup or new hardware program
Experience with in-memory compute, processing-in-memory, or analog hardware interfaces
Contributions to open-source compiler or runtime infrastructure
Experience with hardware-software co-design where software insights shaped ISA or architecture decisions
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nNormal's ASIC computes using stochastic analog dynamics in memory, and the software layer that makes it programmable and performant for real inference workloads does not yet exist in any standard form. As our Silicon Software Lead, you will lead the team that creates it: the compiler, runtime, kernels, drivers, and hardware abstraction layer that turn our chip into a platform. You will set technical direction, stay hands-on in the stack, and co-design with hardware architects so that software constraints shape the silicon rather than arriving after it.\n\nThis is a role for someone who has built software for hardware that did not exist yet, and wants to do it where the software genuinely impacts and optimizes the hardware.\n\n\n\n\nWHAT YOU WILL OWN\n\n - Team Leadership: Lead and grow the silicon software team spanning compiler, runtime, and systems software, staying close enough to the code to review designs and unblock hard problems directly.\n\n - Software Stack Architecture: Own the architecture of the stack from ML framework ingestion through compilation, scheduling, and memory management to execution on Normal hardware.\n\n - Software/Hardware Co-Design: Partner with silicon architects on ISA definition and the hardware abstraction layer, ensuring the chip is compilable and programmable, not just simulatable.\n\n - Runtime and Tooling: Drive development of the runtime, kernels, drivers, profiling, and debugging tools that make the hardware usable for real inference workloads.\n\n - Simulation-to-Silicon Continuity: Keep the software stack running against simulation, FPGA prototypes, and silicon as the hardware matures, so software development never waits on tapeout.\n\n - Roadmap and Hiring: Set the silicon software roadmap, define milestones against the hardware program, and hire the engineers who deliver it.\n\n\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Substantial experience building software stacks for accelerators or non-standard hardware targets: compilers, runtimes, kernels, or drivers\n\n - Experience leading engineers as a technical lead or manager while staying hands-on in design and code\n\n - Strong systems programming skills in C++, Rust, or equivalent, with fluency in Python\n\n - Deep understanding of ML inference workloads and the constraints that shape their execution on hardware\n\n - Experience with compiler frameworks such as MLIR or LLVM, or with inference runtimes and kernel development\n\n - Comfort building software for hardware that is still evolving, from simulation through bring-up\n\n - Track record of hiring and developing strong systems engineers\n\n\n\n\nBONUS POINTS\n\n - Experience taking an accelerator software stack from zero to production at a startup or new hardware program\n\n - Experience with in-memory compute, processing-in-memory, or analog hardware interfaces\n\n - Contributions to open-source compiler or runtime infrastructure\n\n - Experience with hardware-software co-design where software insights shaped ISA or architecture decisions\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"341176b4-01da-48e7-b055-04b518368272","title":"Hardware Engineer, PCB","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-07-29T17:22:49.892+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/341176b4-01da-48e7-b055-04b518368272","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/341176b4-01da-48e7-b055-04b518368272/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
Normal Computing is redefining computing for the next 20 years by optimizing LLM and Diffusion inference by 100–1000x through combining thermodynamic computing and CIM technology. You will own the end-to-end development of our CIM substrate from architecture and schematic design to layout, tapeout, custom PCB development, and post-silicon bring-up.
End-to-end PCB design flow: lead the full PCB development cycle including research, design, and evaluation of custom chips
Silicon bring-up: lead post-silicon correlation and validation efforts including root-cause analysis and general debug
PCB bring-up: ensure the PCB you designed and manufactured is fully functional as intended
Cross-functional collaboration: work alongside analog, digital, and ML engineers to further improve system-level PPA.
Owned multiple PCBs end-to-end through design, simulation, fabrication and bringup
Familiar with common PCB tools, including Altium, Allegro, OrCAD, Xpedition
Built PCBs for expansion formats like PCIe, and including components like FPGAs, high-speed memories, flash memories, and various connectors like 100G ethernet
Lead, fabricated, brought up custom PCBs to evaluate custom CIM chips
Experienced and comfortable in a lab bench environment including soldering with a microscope
Have used scripting languages (i.e. Python, Perl) to automate design flows and data post-processing
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nNormal Computing is redefining computing for the next 20 years by optimizing LLM and Diffusion inference by 100–1000x through combining thermodynamic computing and CIM technology. You will own the end-to-end development of our CIM substrate from architecture and schematic design to layout, tapeout, custom PCB development, and post-silicon bring-up.\n\n\n\nWHAT YOU WILL OWN\n\n - End-to-end PCB design flow: lead the full PCB development cycle including research, design, and evaluation of custom chips\n\n - Silicon bring-up: lead post-silicon correlation and validation efforts including root-cause analysis and general debug\n\n - PCB bring-up: ensure the PCB you designed and manufactured is fully functional as intended\n\n - Cross-functional collaboration: work alongside analog, digital, and ML engineers to further improve system-level PPA.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Owned multiple PCBs end-to-end through design, simulation, fabrication and bringup\n\n - Familiar with common PCB tools, including Altium, Allegro, OrCAD, Xpedition\n\n - Built PCBs for expansion formats like PCIe, and including components like FPGAs, high-speed memories, flash memories, and various connectors like 100G ethernet\n\n\nBONUS POINTS\n\n - Lead, fabricated, brought up custom PCBs to evaluate custom CIM chips\n\n - Experienced and comfortable in a lab bench environment including soldering with a microscope\n\n - Have used scripting languages (i.e. Python, Perl) to automate design flows and data post-processing\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"b8e668a1-0e74-4778-bb29-ee5037cbb3c9","title":"Research Engineer, Algorithms","department":"Engineering","team":"Silicon Software & Algorithms","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-07-31T04:18:22.261+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/b8e668a1-0e74-4778-bb29-ee5037cbb3c9","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/b8e668a1-0e74-4778-bb29-ee5037cbb3c9/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
You will develop the computational methods that make AI inference run efficiently on Normal's thermodynamic hardware. The core challenge is not adapting standard GPU kernels to a new chip. It is rethinking how operations like attention, memory access, and long-context decoding behave when the underlying substrate uses stochastic analog computation in memory rather than conventional digital logic.
Normal's ASICs run the heaviest operations of large model inference inside memory itself. Your job is to develop the algorithms that exploit this natively: understand what transformer and diffusion workloads are well-suited to stochastic analog execution, design numerical methods that map onto the hardware's physical dynamics, and validate them against real silicon or high-fidelity simulation.
This is a co-design role. The hardware and the algorithms are developed in parallel, which means you will influence architectural decisions, not just implement against a fixed specification. The strongest candidates have a deep understanding of both large model inference and the mathematics of stochastic systems, and have built systems that run on real hardware, not just in theory.
Algorithm Development: Develop algorithms for transformer inference workloads running on stochastic analog processing-with-memory hardware.
Software/Hardware Co-Design: Work directly with hardware and architecture teams to shape what the chip can and should compute natively.
Numerical Methods: Design numerical methods that exploit thermal noise and analog dynamics rather than working around them.
Evaluation & Benchmarks: Build evaluation frameworks and benchmarks that characterize algorithm behavior on real hardware or simulation.
Workload Translation: Translate insights about model workloads into constraints and opportunities for hardware design.
Rapid Prototyping: Prototype and iterate rapidly as hardware evolves from simulation to silicon.
Optimizing Performance: at the gate level and the algorithmic level. and algorithms (expand/review), reinforcement learning tools.
Deep understanding of large model inference: attention mechanisms, KV cache, long-context decoding, memory bandwidth constraints
Experience with inference optimization: quantization, sparsity, kernel fusion, or memory-efficient attention
Familiarity with stochastic systems, probabilistic methods, numerical analysis, or analog computation
Experience implementing algorithms close to hardware, not just in high-level frameworks
Comfort reasoning from first principles about what a novel substrate can do efficiently
Track record of taking ideas from theory to working implementation on real hardware
Strong programming skills in Python and at least one systems language
Collaborative instinct and ability to work across hardware, architecture, and software teams
PhD in machine learning, applied mathematics, physics, electrical engineering, or a related field
Exposure to analog or mixed-signal systems, in-memory compute, or non-von-Neumann architectures
Experience working on hardware that did not yet exist when you joined
Publications or open-source work in efficient inference, stochastic algorithms, or novel computing
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nYou will develop the computational methods that make AI inference run efficiently on Normal's thermodynamic hardware. The core challenge is not adapting standard GPU kernels to a new chip. It is rethinking how operations like attention, memory access, and long-context decoding behave when the underlying substrate uses stochastic analog computation in memory rather than conventional digital logic.\n\nNormal's ASICs run the heaviest operations of large model inference inside memory itself. Your job is to develop the algorithms that exploit this natively: understand what transformer and diffusion workloads are well-suited to stochastic analog execution, design numerical methods that map onto the hardware's physical dynamics, and validate them against real silicon or high-fidelity simulation.\n\nThis is a co-design role. The hardware and the algorithms are developed in parallel, which means you will influence architectural decisions, not just implement against a fixed specification. The strongest candidates have a deep understanding of both large model inference and the mathematics of stochastic systems, and have built systems that run on real hardware, not just in theory.\n\n\n\n\nWHAT YOU WILL OWN\n\n - Algorithm Development: Develop algorithms for transformer inference workloads running on stochastic analog processing-with-memory hardware.\n\n - Software/Hardware Co-Design: Work directly with hardware and architecture teams to shape what the chip can and should compute natively.\n\n - Numerical Methods: Design numerical methods that exploit thermal noise and analog dynamics rather than working around them.\n\n - Evaluation & Benchmarks: Build evaluation frameworks and benchmarks that characterize algorithm behavior on real hardware or simulation.\n\n - Workload Translation: Translate insights about model workloads into constraints and opportunities for hardware design.\n\n - Rapid Prototyping: Prototype and iterate rapidly as hardware evolves from simulation to silicon.\n\n - Optimizing Performance: at the gate level and the algorithmic level. and algorithms (expand/review), reinforcement learning tools.\n\n\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Deep understanding of large model inference: attention mechanisms, KV cache, long-context decoding, memory bandwidth constraints\n\n - Experience with inference optimization: quantization, sparsity, kernel fusion, or memory-efficient attention\n\n - Familiarity with stochastic systems, probabilistic methods, numerical analysis, or analog computation\n\n - Experience implementing algorithms close to hardware, not just in high-level frameworks\n\n - Comfort reasoning from first principles about what a novel substrate can do efficiently\n\n - Track record of taking ideas from theory to working implementation on real hardware\n\n - Strong programming skills in Python and at least one systems language\n\n - Collaborative instinct and ability to work across hardware, architecture, and software teams\n\n\n\n\nBONUS POINTS\n\n - PhD in machine learning, applied mathematics, physics, electrical engineering, or a related field\n\n - Exposure to analog or mixed-signal systems, in-memory compute, or non-von-Neumann architectures\n\n - Experience working on hardware that did not yet exist when you joined\n\n - Publications or open-source work in efficient inference, stochastic algorithms, or novel computing\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"dfe9ab4e-b624-4a33-9c6b-04a3de3fabe0","title":"Talent Operations Specialist","department":"Business & Operations","team":"Talent Acquisition","employmentType":"FullTime","location":"Silicon Valley","secondaryLocations":[],"publishedAt":"2026-08-24T18:25:10.724+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/dfe9ab4e-b624-4a33-9c6b-04a3de3fabe0","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/dfe9ab4e-b624-4a33-9c6b-04a3de3fabe0/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As our Talent Operations Specialist, you will own and scale the engine behind how Normal hires world-class talent across hardware, software, and AI. You sit at the strategic center of our global talent organization, acting as the right hand to our Head of Talent to build high-efficiency recruiting workflows, maintain our data integrity, and eliminate friction across five global time zones.
At Normal, we operate in a fast-moving, highly evolving environment where priorities shift and ambiguity is constant. You are someone who thrives on context-switching—effortlessly pivoting between long-term system architecture and immediate operational priorities. Rather than just manually moving candidates through calendars, you take complete ownership of our talent infrastructure: optimizing Ashby, building real-time executive dashboards, automating scheduling flows, and ensuring our recruiting operation runs on rails as we scale.
Recruiting Systems & Ashby ATS Architecture: Serve as the primary admin for Ashby. Permission and seat management, pipeline stages, build custom candidate communication templates, configure auto-scheduling rules, and manage integrations across our tech stack (Slack, Notion, AI Notetaker, Google Workspace).
Data Integrity and Compliance: Own the day-to-day health of candidate data in Ashby. Maintain retention and consent configurations, execute scheduled record dispositions, monitor duplicate and fraud-flagged records, and keep candidate data practices aligned with Normal’s published privacy commitments across US and global applicants.
Interview Coordination: Provide secondary coverage for interview scheduling when volume spikes or primary coordination is unavailable.
Talent Analytics & Reporting: Build and maintain recruiting dashboards to track funnel conversion, candidate velocity, source effectiveness, and interviewer loads. Deliver data-backed insights to the Head of Talent and leadership to optimize hiring SLAs.
Interviewer & Hiring Manager Enablement: Partner with recruiting leads to standardize interview loops, establish scorecard guidelines, onboard new interviewers, and build clear Notion documentation for team-wide hiring practices.
Special Projects & Strategic Support: Partner directly with the Head of Talent on high-impact initiatives, including headcount planning support, talent brand launches, recruiting event logistics, and strategic ad-hoc projects.
Talent Ops or Advanced Coordination: You have experience in a fast-scaling tech startup, high-growth environment, or deep-tech company.
Extreme Ownership & Accountability: You treat the recruiting engine as your own product. You flag problems while they are small, fix broken processes without being asked, and close loops relentlessly.
Comfort with Context-Switching & Ambiguity: Highly adaptable and composed when priorities shift in a fast-paced, evolving startup environment.
Mastery of ATS Infrastructure: Hands-on experience administering Ashby (or Greenhouse/Lever) with a track record of setting up structured pipelines, custom fields, offer workflows, and automated scheduling rules.
Data-Fluent & Analytical: Comfortable working with recruiting metrics, building custom reports, identifying pipeline bottlenecks, and presenting data clearly to stakeholders.
Systems & Automation Mindset: Passionate about documentation, process hygiene, and using modern tools (Slack, Notion, AI assistants, low-code automations) to replace manual administrative work.
Global & Cross-Functional Comfort: Experienced in navigating multi-time-zone communication (US, Europe, APAC) with high attention to detail and proactive communication default.
Advanced experience specifically with Ashby
Experience supporting fast-moving technology startups.
Background in setting up interviewer calibration modules or candidate NPS loops
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs our Talent Operations Specialist, you will own and scale the engine behind how Normal hires world-class talent across hardware, software, and AI. You sit at the strategic center of our global talent organization, acting as the right hand to our Head of Talent to build high-efficiency recruiting workflows, maintain our data integrity, and eliminate friction across five global time zones.\n\nAt Normal, we operate in a fast-moving, highly evolving environment where priorities shift and ambiguity is constant. You are someone who thrives on context-switching—effortlessly pivoting between long-term system architecture and immediate operational priorities. Rather than just manually moving candidates through calendars, you take complete ownership of our talent infrastructure: optimizing Ashby, building real-time executive dashboards, automating scheduling flows, and ensuring our recruiting operation runs on rails as we scale.\n\n\nWHAT YOU’LL OWN\n\n - Recruiting Systems & Ashby ATS Architecture: Serve as the primary admin for Ashby. Permission and seat management, pipeline stages, build custom candidate communication templates, configure auto-scheduling rules, and manage integrations across our tech stack (Slack, Notion, AI Notetaker, Google Workspace).\n\n - Data Integrity and Compliance: Own the day-to-day health of candidate data in Ashby. Maintain retention and consent configurations, execute scheduled record dispositions, monitor duplicate and fraud-flagged records, and keep candidate data practices aligned with Normal’s published privacy commitments across US and global applicants.\n\n - Interview Coordination: Provide secondary coverage for interview scheduling when volume spikes or primary coordination is unavailable.\n\n - Talent Analytics & Reporting: Build and maintain recruiting dashboards to track funnel conversion, candidate velocity, source effectiveness, and interviewer loads. Deliver data-backed insights to the Head of Talent and leadership to optimize hiring SLAs.\n\n - Interviewer & Hiring Manager Enablement: Partner with recruiting leads to standardize interview loops, establish scorecard guidelines, onboard new interviewers, and build clear Notion documentation for team-wide hiring practices.\n\n - Special Projects & Strategic Support: Partner directly with the Head of Talent on high-impact initiatives, including headcount planning support, talent brand launches, recruiting event logistics, and strategic ad-hoc projects.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Talent Ops or Advanced Coordination: You have experience in a fast-scaling tech startup, high-growth environment, or deep-tech company.\n\n - Extreme Ownership & Accountability: You treat the recruiting engine as your own product. You flag problems while they are small, fix broken processes without being asked, and close loops relentlessly.\n\n - Comfort with Context-Switching & Ambiguity: Highly adaptable and composed when priorities shift in a fast-paced, evolving startup environment.\n\n - Mastery of ATS Infrastructure: Hands-on experience administering Ashby (or Greenhouse/Lever) with a track record of setting up structured pipelines, custom fields, offer workflows, and automated scheduling rules.\n\n - Data-Fluent & Analytical: Comfortable working with recruiting metrics, building custom reports, identifying pipeline bottlenecks, and presenting data clearly to stakeholders.\n\n - Systems & Automation Mindset: Passionate about documentation, process hygiene, and using modern tools (Slack, Notion, AI assistants, low-code automations) to replace manual administrative work.\n\n - Global & Cross-Functional Comfort: Experienced in navigating multi-time-zone communication (US, Europe, APAC) with high attention to detail and proactive communication default.\n\n\nBONUS POINTS\n\n - Advanced experience specifically with Ashby\n\n - Experience supporting fast-moving technology startups.\n\n - Background in setting up interviewer calibration modules or candidate NPS loops\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"51c718cf-7187-472b-b126-86b1b2bb9896","title":"Software Engineer, Agent Systems","department":"Engineering","team":"Software","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Zurich","address":{"postalAddress":{"addressRegion":"Switzerland","addressCountry":"Switzerland","addressLocality":"Zurich"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-08-10T04:38:59.595+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/51c718cf-7187-472b-b126-86b1b2bb9896","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/51c718cf-7187-472b-b126-86b1b2bb9896/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As a Software Engineer at Normal, you will build the backend runtimes and distributed systems behind our AI products. You'll design orchestration services, execution environments, internal APIs, persistence layers, and observability systems that allow AI agents to perform long-running work reliably.
These systems coordinate workloads across distributed environments, execute code and tools securely, preserve state across long-running sessions, and recover cleanly from failures. Your work will turn ambitious AI prototypes into dependable products used in real customer workflows.
The role spans backend, AI, and platform engineering. Its focus is the application and runtime layer but not general-purpose cloud infrastructure or company-wide developer operations. You'll work closely with product, AI, research, and platform engineers to define the interfaces between AI capabilities, execution environments, and production services.
On any given day, you might design the execution model for a new AI capability, build an orchestration service for autonomous workflows, improve the scheduling and isolation of distributed workloads, or create an API that makes a complex runtime capability easy for other engineers to use.
Runtime and Orchestration: Build the services that manage agent execution, session lifecycles, long-running workflows, and distributed workloads.
Backend Systems and APIs: Design reliable services, data models, and internal APIs used by product engineers, AI engineers, and execution systems.
State and Failure Handling: Develop clear models for persistence, retries, queues, leases, cancellation, recovery, and other distributed-systems concerns.
Execution Environments: Build software that schedules and manages containerized workloads in Kubernetes-backed environments, including lifecycle, isolation, autoscaling, and resource management.
Reliability and Observability: Make evolving systems easier to operate through thoughtful metrics, tracing, debugging tools, and well-defined failure modes.
Developer Experience: Create abstractions and tools that allow other engineers to extend the platform without needing to understand every underlying implementation detail.
Prototype-to-Production Engineering: Turn promising prototypes into durable systems by clarifying boundaries, hardening critical paths, and introducing operational patterns that scale.
Technical Design: Facilitate design discussions around runtime architecture, API boundaries, state management, execution models, and operational tradeoffs.
4+ years of software engineering experience in backend systems, distributed systems, developer platforms, production infrastructure, or a related area.
Strong backend engineering fundamentals, including API design, data modeling, concurrency, debugging, and testing.
Experience designing and operating production services where reliability, observability, and maintainability matter.
Experience reasoning about distributed state and failure modes, including retries, queues, leases, scheduling, idempotency, and long-running workflows.
Practical experience with containers and Kubernetes-backed systems, including workload lifecycle, networking, resource limits, and production debugging.
Experience with production data systems such as Postgres, Redis or Valkey, and object storage.
Experience building orchestration systems, workflow engines, job schedulers, sandboxes, developer platforms, or distributed execution systems.
A track record of designing APIs and abstractions that other engineers can use confidently.
Pragmatic judgment in fast-moving environments: you know when to improve an abstraction, simplify it, or ship the straightforward version.
A strong sense of ownership for how your software behaves in production and how effectively others can use it.
Experience building systems for AI agents, model orchestration, code execution, or other LLM-powered products.
Deep Kubernetes knowledge, such as controllers, scheduling, networking, storage, autoscaling, or resource isolation.
Experience with secure or sandboxed code execution.
Background in reliability engineering, infrastructure software, or developer platforms at meaningful scale.
Experience working in high-growth environments where systems and ownership boundaries are still taking shape.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs a Software Engineer at Normal, you will build the backend runtimes and distributed systems behind our AI products. You'll design orchestration services, execution environments, internal APIs, persistence layers, and observability systems that allow AI agents to perform long-running work reliably.\n\nThese systems coordinate workloads across distributed environments, execute code and tools securely, preserve state across long-running sessions, and recover cleanly from failures. Your work will turn ambitious AI prototypes into dependable products used in real customer workflows.\n\nThe role spans backend, AI, and platform engineering. Its focus is the application and runtime layer but not general-purpose cloud infrastructure or company-wide developer operations. You'll work closely with product, AI, research, and platform engineers to define the interfaces between AI capabilities, execution environments, and production services.\n\nOn any given day, you might design the execution model for a new AI capability, build an orchestration service for autonomous workflows, improve the scheduling and isolation of distributed workloads, or create an API that makes a complex runtime capability easy for other engineers to use.\n\n\nWHAT YOU WILL OWN\n\n - Runtime and Orchestration: Build the services that manage agent execution, session lifecycles, long-running workflows, and distributed workloads.\n\n - Backend Systems and APIs: Design reliable services, data models, and internal APIs used by product engineers, AI engineers, and execution systems.\n\n - State and Failure Handling: Develop clear models for persistence, retries, queues, leases, cancellation, recovery, and other distributed-systems concerns.\n\n - Execution Environments: Build software that schedules and manages containerized workloads in Kubernetes-backed environments, including lifecycle, isolation, autoscaling, and resource management.\n\n - Reliability and Observability: Make evolving systems easier to operate through thoughtful metrics, tracing, debugging tools, and well-defined failure modes.\n\n - Developer Experience: Create abstractions and tools that allow other engineers to extend the platform without needing to understand every underlying implementation detail.\n\n - Prototype-to-Production Engineering: Turn promising prototypes into durable systems by clarifying boundaries, hardening critical paths, and introducing operational patterns that scale.\n\n - Technical Design: Facilitate design discussions around runtime architecture, API boundaries, state management, execution models, and operational tradeoffs.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - 4+ years of software engineering experience in backend systems, distributed systems, developer platforms, production infrastructure, or a related area.\n\n - Strong backend engineering fundamentals, including API design, data modeling, concurrency, debugging, and testing.\n\n - Experience designing and operating production services where reliability, observability, and maintainability matter.\n\n - Experience reasoning about distributed state and failure modes, including retries, queues, leases, scheduling, idempotency, and long-running workflows.\n\n - Practical experience with containers and Kubernetes-backed systems, including workload lifecycle, networking, resource limits, and production debugging.\n\n - Experience with production data systems such as Postgres, Redis or Valkey, and object storage.\n\n - Experience building orchestration systems, workflow engines, job schedulers, sandboxes, developer platforms, or distributed execution systems.\n\n - A track record of designing APIs and abstractions that other engineers can use confidently.\n\n - Pragmatic judgment in fast-moving environments: you know when to improve an abstraction, simplify it, or ship the straightforward version.\n\n - A strong sense of ownership for how your software behaves in production and how effectively others can use it.\n\n\nBONUS POINTS\n\n - Experience building systems for AI agents, model orchestration, code execution, or other LLM-powered products.\n\n - Deep Kubernetes knowledge, such as controllers, scheduling, networking, storage, autoscaling, or resource isolation.\n\n - Experience with secure or sandboxed code execution.\n\n - Background in reliability engineering, infrastructure software, or developer platforms at meaningful scale.\n\n - Experience working in high-growth environments where systems and ownership boundaries are still taking shape.\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"d6869bfd-d8f8-4a3e-88ac-d65e870b57cb","title":"Hardware Engineer, Physical Design","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"Silicon Valley","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Zurich","address":{"postalAddress":{"addressRegion":"Switzerland","addressCountry":"Switzerland","addressLocality":"Zurich"}}},{"location":"New York City","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}}}],"publishedAt":"2026-07-31T06:39:04.580+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/d6869bfd-d8f8-4a3e-88ac-d65e870b57cb","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/d6869bfd-d8f8-4a3e-88ac-d65e870b57cb/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
As a Physical Design Engineer at Normal, you will own the end-to-end silicon realization path, taking complex architectures from synthesis and physical floorplanning all the way through timing signoff and GDSII tapeout. Sitting at the intersection of custom ASIC design and our hardware-algorithm co-designed systems, you will shape physical feasibility early in the design cycle by working shoulder-to-shoulder with RTL and architecture teams. You'll drive the full backend implementation flow—optimizing floorplanning, place-and-route (P&R), clock tree synthesis (CTS), static timing analysis (STA), and physical verification (DRC/LVS) to achieve aggressive power, performance, and area (PPA) targets.
We are looking for a seasoned engineer who thrives in cross-functional environments and takes pride in tapeout-proven execution. The ideal candidate brings a meticulous approach to physical signoff, maintains clarity in fast-paced build cycles, and is excited to solve the physical constraints of novel computing architectures.
Physical Implementation & Flow: Lead the full netlist-to-GDSII physical design flow, including floorplanning, power grid design, placement, clock tree synthesis (CTS), and place-and-route (P&R).
Timing Closure & STA: Own static timing analysis (STA), timing constraints creation/validation, and signoff timing closure across all operating corners and modes.
Power, Area, and Signal Integrity: Drive physical optimization for power, performance, and area (PPA), as well as power integrity (IR/EM) and crosstalk analysis.
Physical Signoff & Verification: Execute full chip/block physical signoff checks, including DRC, LVS, ERC, and antenna fixes, ensuring seamless handoff to the foundry.
Design & Floorplan Reviews: Collaborate closely with RTL, architecture, and DFT teams to influence early floorplanning, macro placement, pin assignments, and physical feasibility.
Tapeout & Post-Silicon Support: Create and execute tapeout checklists, manage final stream-out processes, and support post-silicon physical debugging and bring-up as needed.
Tapeout Track Record: At least 3+ successful tapeouts from netlist to signoff, ideally across advanced technology nodes.
PD Flow Expertise: Deep hands-on experience with industry-standard physical design tools (e.g., Innovus, IC Compiler II, Tempus, PrimeTime, Pegasus, Calibre) across floorplanning, P&R, CTS, and signoff timing closure.
Backend Debugging Instincts: Strong problem-solving skills in analyzing and resolving STA timing bottlenecks, IR/EM drop issues, crosstalk, and complex DRC/LVS signoff violations.
Cross-Functional Feasibility: Ability to collaborate effectively with RTL, architecture, and DFT teams to influence floorplanning, pin placement, and early physical feasibility.
Experience at an AI or high-performance compute (HPC) chip startup where design, verification, and PD work in tight iteration cycles.
Experience with custom memory/macro floorplanning, hierarchical top-level implementation, or advanced packaging (e.g., chiplets, 2.5D/3D integration).
Hands-on experience developing or maintaining automated TCL/Python scripting frameworks for physical design flows.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE ROLE\n\nAs a Physical Design Engineer at Normal, you will own the end-to-end silicon realization path, taking complex architectures from synthesis and physical floorplanning all the way through timing signoff and GDSII tapeout. Sitting at the intersection of custom ASIC design and our hardware-algorithm co-designed systems, you will shape physical feasibility early in the design cycle by working shoulder-to-shoulder with RTL and architecture teams. You'll drive the full backend implementation flow—optimizing floorplanning, place-and-route (P&R), clock tree synthesis (CTS), static timing analysis (STA), and physical verification (DRC/LVS) to achieve aggressive power, performance, and area (PPA) targets.\n\nWe are looking for a seasoned engineer who thrives in cross-functional environments and takes pride in tapeout-proven execution. The ideal candidate brings a meticulous approach to physical signoff, maintains clarity in fast-paced build cycles, and is excited to solve the physical constraints of novel computing architectures.\n\n\n\n\nWHAT YOU WILL OWN\n\n - Physical Implementation & Flow: Lead the full netlist-to-GDSII physical design flow, including floorplanning, power grid design, placement, clock tree synthesis (CTS), and place-and-route (P&R).\n\n - Timing Closure & STA: Own static timing analysis (STA), timing constraints creation/validation, and signoff timing closure across all operating corners and modes.\n\n - Power, Area, and Signal Integrity: Drive physical optimization for power, performance, and area (PPA), as well as power integrity (IR/EM) and crosstalk analysis.\n\n - Physical Signoff & Verification: Execute full chip/block physical signoff checks, including DRC, LVS, ERC, and antenna fixes, ensuring seamless handoff to the foundry.\n\n - Design & Floorplan Reviews: Collaborate closely with RTL, architecture, and DFT teams to influence early floorplanning, macro placement, pin assignments, and physical feasibility.\n\n - Tapeout & Post-Silicon Support: Create and execute tapeout checklists, manage final stream-out processes, and support post-silicon physical debugging and bring-up as needed.\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - Tapeout Track Record: At least 3+ successful tapeouts from netlist to signoff, ideally across advanced technology nodes.\n\n - PD Flow Expertise: Deep hands-on experience with industry-standard physical design tools (e.g., Innovus, IC Compiler II, Tempus, PrimeTime, Pegasus, Calibre) across floorplanning, P&R, CTS, and signoff timing closure.\n\n - Backend Debugging Instincts: Strong problem-solving skills in analyzing and resolving STA timing bottlenecks, IR/EM drop issues, crosstalk, and complex DRC/LVS signoff violations.\n\n - Cross-Functional Feasibility: Ability to collaborate effectively with RTL, architecture, and DFT teams to influence floorplanning, pin placement, and early physical feasibility.\n\n\nBONUS POINTS\n\n - Experience at an AI or high-performance compute (HPC) chip startup where design, verification, and PD work in tight iteration cycles.\n\n - Experience with custom memory/macro floorplanning, hierarchical top-level implementation, or advanced packaging (e.g., chiplets, 2.5D/3D integration).\n\n - Hands-on experience developing or maintaining automated TCL/Python scripting frameworks for physical design flows.\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"5d57d8b1-612d-4ee0-941e-78a032a1ada2","title":"Thermodynamic Hardware Resident","department":"Internships","team":"Internships","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}}],"publishedAt":"2026-08-22T23:48:35.443+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/5d57d8b1-612d-4ee0-941e-78a032a1ada2","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/5d57d8b1-612d-4ee0-941e-78a032a1ada2/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The Thermodynamic Hardware Residency is Normal Computing's flagship program for exceptional researchers and engineers who want to work at the frontier of unconventional computing. Residents join a small, hand-picked cohort with a dedicated research mentor, direct access to the team building our cutting-edge thermodynamic hardware, and a clear arc from onboarding through publication.
Every residency is built around two milestones that mark you as part of something bigger than a single project: a research paper co-authored with our team, and a company-wide research colloquium where you present your findings to the full Normal Computing organization. You'll leave with a body of published, presented work, and a standing as one of the earliest residents to help define what this program becomes. Exceptional performers will be considered for full-time conversion at the end of the residency.
You'll spend your residency embedded with the team building and characterizing our unconventional, thermodynamic computing hardware — silicon that exploits physical noise and analog dynamics rather than fighting them.
This is a hands-on research residency: you'll take ownership of a real technical problem at the boundary of physics, hardware, and machine learning, work alongside the researchers and engineers building our hardware, and be expected to contribute ideas, not just execute someone else's.
Our hardware is designed to deliver orders-of-magnitude more AI inference per dollar, per watt than conventional GPUs — not by porting existing GPU kernels onto new chips, but by rethinking how core operations work when the substrate itself is stochastic analog computation in memory rather than conventional digital logic. That rethinking, from device physics up through algorithms, is exactly the kind of problem residents take on.
You'll get direct exposure to the pace, ambiguity, and speed of decision-making that comes with working at a fast-moving, well-funded hardware startup — where the distance between an idea on a whiteboard and a test on real silicon is measured in weeks, not years.
Work hands-on with thermodynamic hardware. Help design, simulate, characterize, or evaluate our hardware, where noise, analog dynamics, and in-memory computation are first-class design elements rather than sources of error to be engineered away.
Design numerical methods for a new substrate. Explore algorithms and numerical methods that exploit thermal noise and analog dynamics directly, rather than adapting techniques built for conventional digital hardware.
Drive a research question of your own. Partner with researchers and hardware engineers to scope, run, and iterate on an original technical investigation — from device- or circuit-level physics up to algorithms and workloads that map onto thermodynamic compute.
Build evaluation frameworks and benchmarks. Help build the tests and benchmarks that measure how algorithmic ideas actually perform on real hardware and in simulation, and feed what you learn about model workloads back into hardware design decisions.
Co-author a paper. Work with the team to write up your findings for submission to a relevant venue, with mentorship on framing, experiments, and technical writing along the way — one of the two milestones every resident builds toward.
Present at the residency colloquium. Share your work and thinking with the broader Normal Computing research community at the program's capstone event, and get real-time feedback from people building this technology every day.
Experience startup pace firsthand. Work directly with founders, senior researchers, and engineers in a lean, fast-moving environment where priorities shift quickly and your work has an outsized, visible impact.
Currently pursuing or recently completed a graduate degree (MS or PhD, or equivalent research experience) in physics, electrical engineering, computer engineering, computer science, applied math, or a related field — with a focus on hardware, device physics, stochastic or analog computing, or machine learning systems.
Comfortable moving between levels of abstraction: from the physics of noise and analog devices, to circuit- and architecture-level tradeoffs, to the algorithms and workloads that will eventually run on this hardware.
Some exposure to large-model inference concepts — attention mechanisms, KV caching, long-context decoding — and an interest in how they change when the underlying hardware isn't a GPU. Production-level experience isn't expected at the resident level, but the intuition should feel familiar.
Strong Python skills, plus comfort with (or eagerness to learn) a lower-level systems language such as C++ or Rust; hands-on experience with simulation, experimentation, or hardware characterization (e.g., SPICE, PyTorch, FPGA or ASIC tooling) is a plus.
First-principles reasoning about novel computational substrates: a genuine curiosity about unconventional computing, where exploiting thermal noise rather than suppressing it sounds more interesting than intimidating.
Strong written and verbal communication skills; prior experience writing up research (papers, theses, technical reports) is a plus, as is any experience presenting technical work to a live audience.
A bias toward ownership and self-direction: you're energized, not overwhelmed, by the ambiguity and speed of a small, fast-moving startup.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\nTHE RESIDENCY PROGRAM\n\nThe Thermodynamic Hardware Residency is Normal Computing's flagship program for exceptional researchers and engineers who want to work at the frontier of unconventional computing. Residents join a small, hand-picked cohort with a dedicated research mentor, direct access to the team building our cutting-edge thermodynamic hardware, and a clear arc from onboarding through publication.\n\nEvery residency is built around two milestones that mark you as part of something bigger than a single project: a research paper co-authored with our team, and a company-wide research colloquium where you present your findings to the full Normal Computing organization. You'll leave with a body of published, presented work, and a standing as one of the earliest residents to help define what this program becomes. Exceptional performers will be considered for full-time conversion at the end of the residency.\n\n\n\n\nYOUR NORMAL EXPERIENCE\n\n - You'll spend your residency embedded with the team building and characterizing our unconventional, thermodynamic computing hardware — silicon that exploits physical noise and analog dynamics rather than fighting them.\n\n - This is a hands-on research residency: you'll take ownership of a real technical problem at the boundary of physics, hardware, and machine learning, work alongside the researchers and engineers building our hardware, and be expected to contribute ideas, not just execute someone else's.\n\n - Our hardware is designed to deliver orders-of-magnitude more AI inference per dollar, per watt than conventional GPUs — not by porting existing GPU kernels onto new chips, but by rethinking how core operations work when the substrate itself is stochastic analog computation in memory rather than conventional digital logic. That rethinking, from device physics up through algorithms, is exactly the kind of problem residents take on.\n\n - You'll get direct exposure to the pace, ambiguity, and speed of decision-making that comes with working at a fast-moving, well-funded hardware startup — where the distance between an idea on a whiteboard and a test on real silicon is measured in weeks, not years.\n\n\n\n\nWHAT YOU'LL DO\n\n - Work hands-on with thermodynamic hardware. Help design, simulate, characterize, or evaluate our hardware, where noise, analog dynamics, and in-memory computation are first-class design elements rather than sources of error to be engineered away.\n\n - Design numerical methods for a new substrate. Explore algorithms and numerical methods that exploit thermal noise and analog dynamics directly, rather than adapting techniques built for conventional digital hardware.\n\n - Drive a research question of your own. Partner with researchers and hardware engineers to scope, run, and iterate on an original technical investigation — from device- or circuit-level physics up to algorithms and workloads that map onto thermodynamic compute.\n\n - Build evaluation frameworks and benchmarks. Help build the tests and benchmarks that measure how algorithmic ideas actually perform on real hardware and in simulation, and feed what you learn about model workloads back into hardware design decisions.\n\n - Co-author a paper. Work with the team to write up your findings for submission to a relevant venue, with mentorship on framing, experiments, and technical writing along the way — one of the two milestones every resident builds toward.\n\n - Present at the residency colloquium. Share your work and thinking with the broader Normal Computing research community at the program's capstone event, and get real-time feedback from people building this technology every day.\n\n - Experience startup pace firsthand. Work directly with founders, senior researchers, and engineers in a lean, fast-moving environment where priorities shift quickly and your work has an outsized, visible impact.\n\n\n\n\nWHAT WOULD MAKE YOU A GREAT FIT\n\n - Currently pursuing or recently completed a graduate degree (MS or PhD, or equivalent research experience) in physics, electrical engineering, computer engineering, computer science, applied math, or a related field — with a focus on hardware, device physics, stochastic or analog computing, or machine learning systems.\n\n - Comfortable moving between levels of abstraction: from the physics of noise and analog devices, to circuit- and architecture-level tradeoffs, to the algorithms and workloads that will eventually run on this hardware.\n\n - Some exposure to large-model inference concepts — attention mechanisms, KV caching, long-context decoding — and an interest in how they change when the underlying hardware isn't a GPU. Production-level experience isn't expected at the resident level, but the intuition should feel familiar.\n\n - Strong Python skills, plus comfort with (or eagerness to learn) a lower-level systems language such as C++ or Rust; hands-on experience with simulation, experimentation, or hardware characterization (e.g., SPICE, PyTorch, FPGA or ASIC tooling) is a plus.\n\n - First-principles reasoning about novel computational substrates: a genuine curiosity about unconventional computing, where exploiting thermal noise rather than suppressing it sounds more interesting than intimidating.\n\n - Strong written and verbal communication skills; prior experience writing up research (papers, theses, technical reports) is a plus, as is any experience presenting technical work to a live audience.\n\n - A bias toward ownership and self-direction: you're energized, not overwhelmed, by the ambiguity and speed of a small, fast-moving startup.\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"13a520a8-f9d8-486a-943a-ad1d7665cece","title":"Software Engineer, Terminal Interface","department":"Engineering","team":"Software","employmentType":"FullTime","location":"New York City","secondaryLocations":[],"publishedAt":"2026-09-02T23:00:52.050+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/13a520a8-f9d8-486a-943a-ad1d7665cece","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/13a520a8-f9d8-486a-943a-ad1d7665cece/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
Normal CLI is how semiconductor engineers do AI-assisted verification work. It is a large interactive terminal application, built in Python and Textual, that design verification engineers keep open all day, usually in environments we do not control: remote workstations inside chip companies, SSH sessions, tmux, Windows and WSL. Our users are accustomed to terminal products, and for many of them this is the first and only surface of Normal they will use. We expect that to remain true.
We are hiring the engineer who will own it as a product: productionizing what began as a research tool and giving it a dedicated end-user focus. You will own the interaction model and the information design — how people enter and edit instructions, how a long agent run stays legible while it streams, how tool use and proposed changes are presented for review, and how work is interrupted, resumed, and recovered after a failure. You will also own the local session client beneath it, and be a leading voice in the client API the rest of our product is built on.
The boundaries matter here. Our ML and research engineers keep the harness — the skills, tools, hooks, and model behavior that make the agent good at chip verification. You take the application those capabilities reach users through. You will sit on the product engineering team that also builds our desktop workbench, our web product, and our agent orchestration, so the terminal moves into the same product as everything else, with the same vocabulary, state, and quality bar.
On any given day, you might rework how a long verification run folds and summarizes itself so an engineer can read it at a glance, chase down why text input breaks under one customer's terminal and IME combination, turn a recurring support thread into a reusable component and a snapshot test, or push back on a runtime event shape that cannot be rendered well.
The terminal application: Information architecture and interaction across commands, navigation, input and editing, streamed output, progress, review, interruption, recovery, empty states, and errors that tell the user what to do next.
Cross-platform behavior: Correct, fast behavior across terminals, shells, multiplexers, remote sessions, macOS, Linux, Windows and WSL, non-English input and IMEs, and constrained customer environments.
The client boundary: The local session client, and a leading voice in the structured-event interface it consumes. You shape what the runtime emits so the UI does not have to infer intent from formatted text.
Standards other contributors build against: Define the command, picker, progress, output, and review patterns that research and product engineers use when they add domain workflows, and keep the experience coherent as they do.
Responsiveness under load: Streaming, cancellation, concurrency, and event-loop behavior for work that runs for a long time and must stay interruptible and understandable throughout.
A coherent product across surfaces: Shared terminology, state, authentication, and handoffs between the terminal and the rest of our EDA product, so users moving between them do not have to learn two systems.
Architecture: Evolve a large Textual application toward reusable components and a clear line between product UI, domain logic, and runtime concerns.
Confidence to change it: Snapshot and visual-regression coverage, packaging, installation, self-update, and the tests that make it safe to change an interactive application people depend on.
4+ years of software engineering experience, including significant time building and maintaining an interactive terminal application, TUI, or comparably rich local client — not command wrappers.
Experience taking on an existing codebase and improving it without breaking what already worked.
Familiarity with what makes terminal software hard: keyboard and text input, rendering performance, inconsistent terminal capabilities, process and signal handling, and behavior that differs across platforms and environments.
Strong engineering fundamentals. The application is written in Python and Textual; we weigh depth and judgment above prior experience with either.
Experience with event-driven or asynchronous applications: streaming data, local processes, cancellation, concurrency, persistence, and recovery from partial failure.
A high bar for interface details — defaults, error messages, empty states, wording — and a habit of fixing them before users report them.
The ability to debug across boundaries, from a keystroke in a terminal emulator through the application to the runtime.
Experience testing interactive software, and judgment about which behavior is worth pinning down.
Comfort working with researchers and domain experts, and the ability to learn an unfamiliar technical domain well enough to represent an expert workflow accurately.
Pragmatic judgment about when to invest in a durable abstraction and when to ship the straightforward version.
Experience with any of the following is helpful, but not required:
Textual, Rich, prompt-toolkit, curses, Bubble Tea, Ratatui, Ink, or another terminal UI framework
PTYs, terminal emulation, multiplexers, or remote shell and host abstractions
Designing human-in-the-loop experiences for coding agents, AI tools, or other long-running automated systems
Cross-platform packaging, self-update systems, internationalization, IME support, or visual regression testing
Electron or another desktop framework, particularly embedding a CLI, TUI, or agent runtime
Semiconductors, EDA, or hardware engineering workflows
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\n\n\nTHE ROLE\n\nNormal CLI is how semiconductor engineers do AI-assisted verification work. It is a large interactive terminal application, built in Python and Textual, that design verification engineers keep open all day, usually in environments we do not control: remote workstations inside chip companies, SSH sessions, tmux, Windows and WSL. Our users are accustomed to terminal products, and for many of them this is the first and only surface of Normal they will use. We expect that to remain true.\n\nWe are hiring the engineer who will own it as a product: productionizing what began as a research tool and giving it a dedicated end-user focus. You will own the interaction model and the information design — how people enter and edit instructions, how a long agent run stays legible while it streams, how tool use and proposed changes are presented for review, and how work is interrupted, resumed, and recovered after a failure. You will also own the local session client beneath it, and be a leading voice in the client API the rest of our product is built on.\n\nThe boundaries matter here. Our ML and research engineers keep the harness — the skills, tools, hooks, and model behavior that make the agent good at chip verification. You take the application those capabilities reach users through. You will sit on the product engineering team that also builds our desktop workbench, our web product, and our agent orchestration, so the terminal moves into the same product as everything else, with the same vocabulary, state, and quality bar.\n\nOn any given day, you might rework how a long verification run folds and summarizes itself so an engineer can read it at a glance, chase down why text input breaks under one customer's terminal and IME combination, turn a recurring support thread into a reusable component and a snapshot test, or push back on a runtime event shape that cannot be rendered well.\n\n\n\n\nWHAT YOU WILL OWN\n\n - The terminal application: Information architecture and interaction across commands, navigation, input and editing, streamed output, progress, review, interruption, recovery, empty states, and errors that tell the user what to do next.\n\n - Cross-platform behavior: Correct, fast behavior across terminals, shells, multiplexers, remote sessions, macOS, Linux, Windows and WSL, non-English input and IMEs, and constrained customer environments.\n\n - The client boundary: The local session client, and a leading voice in the structured-event interface it consumes. You shape what the runtime emits so the UI does not have to infer intent from formatted text.\n\n - Standards other contributors build against: Define the command, picker, progress, output, and review patterns that research and product engineers use when they add domain workflows, and keep the experience coherent as they do.\n\n - Responsiveness under load: Streaming, cancellation, concurrency, and event-loop behavior for work that runs for a long time and must stay interruptible and understandable throughout.\n\n - A coherent product across surfaces: Shared terminology, state, authentication, and handoffs between the terminal and the rest of our EDA product, so users moving between them do not have to learn two systems.\n\n - Architecture: Evolve a large Textual application toward reusable components and a clear line between product UI, domain logic, and runtime concerns.\n\n - Confidence to change it: Snapshot and visual-regression coverage, packaging, installation, self-update, and the tests that make it safe to change an interactive application people depend on.\n\n\n\n\nWHAT MAKES YOU A GREAT FIT\n\n - 4+ years of software engineering experience, including significant time building and maintaining an interactive terminal application, TUI, or comparably rich local client — not command wrappers.\n\n - Experience taking on an existing codebase and improving it without breaking what already worked.\n\n - Familiarity with what makes terminal software hard: keyboard and text input, rendering performance, inconsistent terminal capabilities, process and signal handling, and behavior that differs across platforms and environments.\n\n - Strong engineering fundamentals. The application is written in Python and Textual; we weigh depth and judgment above prior experience with either.\n\n - Experience with event-driven or asynchronous applications: streaming data, local processes, cancellation, concurrency, persistence, and recovery from partial failure.\n\n - A high bar for interface details — defaults, error messages, empty states, wording — and a habit of fixing them before users report them.\n\n - The ability to debug across boundaries, from a keystroke in a terminal emulator through the application to the runtime.\n\n - Experience testing interactive software, and judgment about which behavior is worth pinning down.\n\n - Comfort working with researchers and domain experts, and the ability to learn an unfamiliar technical domain well enough to represent an expert workflow accurately.\n\n - Pragmatic judgment about when to invest in a durable abstraction and when to ship the straightforward version.\n\n\n\n\nBONUS POINTS\n\nExperience with any of the following is helpful, but not required:\n\n - Textual, Rich, prompt-toolkit, curses, Bubble Tea, Ratatui, Ink, or another terminal UI framework\n\n - PTYs, terminal emulation, multiplexers, or remote shell and host abstractions\n\n - Designing human-in-the-loop experiences for coding agents, AI tools, or other long-running automated systems\n\n - Cross-platform packaging, self-update systems, internationalization, IME support, or visual regression testing\n\n - Electron or another desktop framework, particularly embedding a CLI, TUI, or agent runtime\n\n - Semiconductors, EDA, or hardware engineering workflows\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"f891ec6b-9d1c-4477-a643-08d1accfd3a3","title":"Research Engineer, Agentic EDA","department":"Engineering","team":"AI / ML","employmentType":"FullTime","location":"New York City","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"Zurich","address":{"postalAddress":{"addressRegion":"Switzerland","addressCountry":"Switzerland","addressLocality":"Zurich"}}},{"location":"Silicon Valley","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}}},{"location":"Copenhagen","address":{"postalAddress":{"addressRegion":"Denmark","addressCountry":"Denmark","addressLocality":"Copenhagen"}}}],"publishedAt":"2026-09-30T06:27:16.800+00:00","isListed":true,"isRemote":false,"workplaceType":"OnSite","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/f891ec6b-9d1c-4477-a643-08d1accfd3a3","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/f891ec6b-9d1c-4477-a643-08d1accfd3a3/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
Your Role in Our Mission
We’re hiring a Research Engineer to push the frontier of agentic LLMs and reinforcement learning for pushing the capabilities of Normal EDA, our agentic AI platform for semiconductor design automation. You’ll design and run experiments, build agents, curate datasets from complex technical artifacts, and create rigorous evaluations. You’ll write production‑quality research code and work closely with engineering to ship improvements to customers.
Responsibilities
Build multi-agent systems for code generation that interact with EDA tools (e.g., simulations, waveform analysis, formal tools, physical design tools), propose fixes, and iterate through all stages of chip design and verification flows.
Build research prototypes that integrate with our production agentic code generation tool; collaborate to productionize wins.
Create RL environments and evaluations for agents, explore proxy rewards and consider speed/accuracy tradeoffs of custom tools.
Generate datasets from silicon collateral (e.g., RTL, testbenches, custom VIPs) sources such as RTL designs/VIPs/chip specifications/agent logs; generate synthetic data where appropriate; maintain data cards and licensing.
Analyze experiments with disciplined ablations; document results and drive progress with technical rigour.
Stay current on LLM agents, RL (offline/online, RLHF/RLAIF), constrained decoding, and program synthesis.
What Makes You a Great Fit
PhD in CS/AI/ML (or equivalent research experience) with publications ideally in multi‑agent RL, agentic AI, or RL for language/code.
Strong Python and ML framework experience (PyTorch preferred; JAX/HF a plus).
Demonstrated ability to turn research into working systems
Experience designing evaluation environments and reward models for sequential/agentic tasks.
Experience and fluency with EDA tools (formal, simulation, physical design).
Comfortable with data acquisition/curation; good instincts about data quality and licenses.
Clear communicator who partners well with other engineers.
Bonus Points
Research on program synthesis/codegen, constrained decoding, or execution‑based rewards.
Experience with offline RL from tool traces or human corrections.
Open‑source contributions (e.g., SkyRL, verl, RLlib, Transformers, Pytorch).
Familiarity with semiconductor/chip domains or other complex technical domains.
Track record of shipping research to production.
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\nYour Role in Our Mission\n\nWe’re hiring a Research Engineer to push the frontier of agentic LLMs and reinforcement learning for pushing the capabilities of Normal EDA, our agentic AI platform for semiconductor design automation. You’ll design and run experiments, build agents, curate datasets from complex technical artifacts, and create rigorous evaluations. You’ll write production‑quality research code and work closely with engineering to ship improvements to customers.\n\nResponsibilities\n\n - Build multi-agent systems for code generation that interact with EDA tools (e.g., simulations, waveform analysis, formal tools, physical design tools), propose fixes, and iterate through all stages of chip design and verification flows.\n\n - Build research prototypes that integrate with our production agentic code generation tool; collaborate to productionize wins.\n\n - Create RL environments and evaluations for agents, explore proxy rewards and consider speed/accuracy tradeoffs of custom tools.\n\n - Generate datasets from silicon collateral (e.g., RTL, testbenches, custom VIPs) sources such as RTL designs/VIPs/chip specifications/agent logs; generate synthetic data where appropriate; maintain data cards and licensing.\n\n - Analyze experiments with disciplined ablations; document results and drive progress with technical rigour.\n\n - Stay current on LLM agents, RL (offline/online, RLHF/RLAIF), constrained decoding, and program synthesis.\n\nWhat Makes You a Great Fit\n\n - PhD in CS/AI/ML (or equivalent research experience) with publications ideally in multi‑agent RL, agentic AI, or RL for language/code.\n\n - Strong Python and ML framework experience (PyTorch preferred; JAX/HF a plus).\n\n - Demonstrated ability to turn research into working systems\n\n - Experience designing evaluation environments and reward models for sequential/agentic tasks.\n\n - Experience and fluency with EDA tools (formal, simulation, physical design).\n\n - Comfortable with data acquisition/curation; good instincts about data quality and licenses.\n\n - Clear communicator who partners well with other engineers.\n\nBonus Points\n\n - Research on program synthesis/codegen, constrained decoding, or execution‑based rewards.\n\n - Experience with offline RL from tool traces or human corrections.\n\n - Open‑source contributions (e.g., SkyRL, verl, RLlib, Transformers, Pytorch).\n\n - Familiarity with semiconductor/chip domains or other complex technical domains.\n\n - Track record of shipping research to production.\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."},{"id":"4a991e16-7097-461c-b048-8d9c97cb33c1","title":"Hardware Engineer, System Architect","department":"Engineering","team":"Silicon Hardware","employmentType":"FullTime","location":"Silicon Valley","secondaryLocations":[{"location":"London","address":{"postalAddress":{"addressRegion":"England","addressCountry":"United Kingdom","addressLocality":"London"}}},{"location":"New York City","address":{"postalAddress":{"postalCode":"10011","addressRegion":"New York","addressCountry":"USA","addressLocality":"New York City"}}}],"publishedAt":"2026-09-10T02:39:40.491+00:00","isListed":true,"isRemote":true,"workplaceType":"Hybrid","address":{"postalAddress":{"addressRegion":"California","addressCountry":"United States","addressLocality":"Palo Alto"}},"jobUrl":"https://jobs.ashbyhq.com/normalcomputing/4a991e16-7097-461c-b048-8d9c97cb33c1","applyUrl":"https://jobs.ashbyhq.com/normalcomputing/4a991e16-7097-461c-b048-8d9c97cb33c1/application","descriptionHtml":"Normal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.
The Role
As a Hardware System Design Architect, you will lead the system architecture design of Normal’s AI compute hardware end-to-end, from initial concept to specification, design reviews, integration, and deployment. You will guide system-level decisions spanning boards, chassis, interconnects, and rack-scale system design, collaborating closely across hardware, software, and other engineering teams to ensure system designs meet performance and workload requirements.
You’ll define system requirements and specifications, evaluate architectural options, and drive key technical decisions as our hardware platforms evolve. You’ll evaluate partner and vendor designs against our requirements, identify technical gaps and schedule risks early, and lead system-level tradeoffs. You’ll play a central role in bringing these pieces together into cohesive, high-performance AI compute systems and driving the overall system from architecture through deployment.
What You Will Own
Lead hardware system architecture from initial concept and requirements through design reviews, integration, and production deployment.
Translate workload and performance requirements into hardware decisions, working closely with cross-functional teams and external partners.
Lead architecture design across boards, chassis, and racks, including system topology, power, thermal, scale-up and scale-out fabrics, and networking.
Define and own bring-up, system integration, validation and qualification strategy.
What Makes You a Great Fit
Significant experience architecting complex compute hardware systems, spanning server or machine-level designs through rack-scale platforms
Experience taking hardware systems from early requirements and architecture through specification, integration, bring-up, validation, and production deployment
Experience working with ODMs, suppliers, and other hardware partners, including reviewing designs, defining technical requirements, and driving technical issues to resolution
Degree in Electrical Engineering, Computer Engineering, or a related field
Bonus Points
Experience designing high-performance AI compute systems at server and rack scale
Experience bringing novel hardware architectures into production-scale compute systems
Advanced degree in Electrical Engineering, Computer Engineering, or a related field
Equal Employment Opportunity Statement
Normal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.
Accessibility Accommodations
Normal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.
Privacy Notice
By submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice.
","descriptionPlain":"NORMAL COMPUTING | BUILD WITH US\n\nNormal is an applied AI company solving the hardest problems in AI and silicon. We build foundational hardware and software for the semiconductor industry, critical AI infrastructure, and the broader systems that power our world, in partnership with the world's most advanced institutions. We work as one team across New York City, Silicon Valley (Mountain View), London, Copenhagen, and Seoul.\n\n\n\nThe Role\n\nAs a Hardware System Design Architect, you will lead the system architecture design of Normal’s AI compute hardware end-to-end, from initial concept to specification, design reviews, integration, and deployment. You will guide system-level decisions spanning boards, chassis, interconnects, and rack-scale system design, collaborating closely across hardware, software, and other engineering teams to ensure system designs meet performance and workload requirements.\n\nYou’ll define system requirements and specifications, evaluate architectural options, and drive key technical decisions as our hardware platforms evolve. You’ll evaluate partner and vendor designs against our requirements, identify technical gaps and schedule risks early, and lead system-level tradeoffs. You’ll play a central role in bringing these pieces together into cohesive, high-performance AI compute systems and driving the overall system from architecture through deployment.\n\n\n\nWhat You Will Own\n\n - Lead hardware system architecture from initial concept and requirements through design reviews, integration, and production deployment.\n\n - Translate workload and performance requirements into hardware decisions, working closely with cross-functional teams and external partners.\n\n - Lead architecture design across boards, chassis, and racks, including system topology, power, thermal, scale-up and scale-out fabrics, and networking.\n\n - Define and own bring-up, system integration, validation and qualification strategy.\n \n \n\nWhat Makes You a Great Fit\n\n - Significant experience architecting complex compute hardware systems, spanning server or machine-level designs through rack-scale platforms\n\n - Experience taking hardware systems from early requirements and architecture through specification, integration, bring-up, validation, and production deployment\n\n - Experience working with ODMs, suppliers, and other hardware partners, including reviewing designs, defining technical requirements, and driving technical issues to resolution\n\n - Degree in Electrical Engineering, Computer Engineering, or a related field\n\n\n\nBonus Points\n\n - Experience designing high-performance AI compute systems at server and rack scale\n\n - Experience bringing novel hardware architectures into production-scale compute systems\n\n - Advanced degree in Electrical Engineering, Computer Engineering, or a related field\n\n\n\nEqual Employment Opportunity Statement\n\nNormal Computing is an Equal Opportunity Employer. We celebrate diversity and are committed to creating an inclusive environment for all employees. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other legally protected status.\n\nAccessibility Accommodations\n\nNormal Computing is committed to providing reasonable accommodations to individuals with disabilities. If you need assistance or an accommodation due to a disability, please let us know at accommodations@normalcomputing.com.\n\nPrivacy Notice\n\nBy submitting your application, you agree that Normal Computing may collect, use, and store your personal information for employment-related purposes in accordance with our Applicant Privacy Notice https://normalcomputing.com/applicant-privacy-notice."}],"apiVersion":"1"}